xref: /netbsd/sys/arch/hpcsh/dev/hd64461/hd64461reg.h (revision bf9ec67e)
1 /*	$NetBSD: hd64461reg.h,v 1.2 2001/06/04 17:08:36 uch Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #define SH3_AREA4_BASE					0xb0000000
40 #define SH3_AREA5_BASE					0xb4000000
41 #define SH3_AREA6_BASE					0xb8000000
42 
43 /* HD64461 Address mapping (mapped to SH3 memory space) */
44 
45 /* SH3 Area 4 (Register, Framebuffer) */
46 #define HD64461_REGBASE				SH3_AREA4_BASE
47 #define HD64461_REGSIZE				0x02000000
48 #define HD64461_FBBASE				(SH3_AREA4_BASE + 0x02000000)
49 #define HD64461_FBSIZE				0x02000000
50 #define HD64461_FBPAGESIZE			0x1000
51 
52 /* SH3 Area 5 (PCC1 memory space) */
53 #define HD64461_PCC1_MEMBASE			SH3_AREA5_BASE
54 #define HD64461_PCC1_MEMSIZE			0x02000000
55 
56 /* SH3 Area 6 (PCC0 memory, I/O space*/
57 #define HD64461_PCC0_MEMBASE			SH3_AREA6_BASE
58 #define HD64461_PCC0_MEMSIZE			0x02000000
59 #define HD64461_PCC0_IOBASE			(SH3_AREA6_BASE + 0x02000000)
60 #define HD64461_PCC0_IOSIZE			0x02000000
61 
62 /*
63  * Register mapping.
64  */
65 #define HD64461_SYSTEM_REGBASE				0xb0000000
66 #define HD64461_SYSTEM_REGSIZE				0x00001000
67 
68 #define HD64461_LCDC_REGBASE				0xb0001000
69 #define HD64461_LCDC_REGSIZE				0x00001000
70 
71 #define HD64461_PCMCIA_REGBASE				0xb0002000
72 #define HD64461_PCMCIA_REGSIZE				0x00001000
73 
74 #define HD64461_AFE_REGBASE				0xb0003000
75 #define HD64461_AFE_REGSIZE				0x00001000
76 
77 #define HD64461_GPIO_REGBASE				0xb0004000
78 #define HD64461_GPIO_REGSIZE				0x00001000
79 
80 #define HD64461_INTC_REGBASE				0xb0005000
81 #define HD64461_INTC_REGSIZE				0x00001000
82 
83 #define HD64461_TIMER_REGBASE				0xb0006000
84 #define HD64461_TIMER_REGSIZE				0x00001000
85 
86 #define HD64461_IRDA_REGBASE				0xb0007000
87 #define HD64461_IRDA_REGSIZE				0x00001000
88 
89 #define HD64461_UART_REGBASE				0xb0008000
90 #define HD64461_UART_REGSIZE				0x00001000
91 
92 /*
93  * System Configuration Register and STANBY Mode
94  */
95 /* Stanby Control Register */
96 #define HD64461_SYSSTBCR_REG16				0xb0000000
97 #define HD64461_SYSSTBCR_CKIO_STBY		0x2000
98 #define HD64461_SYSSTBCR_SAFECKE_IST		0x1000
99 #define HD64461_SYSSTBCR_SLCKE_IST		0x0800
100 #define HD64461_SYSSTBCR_SAFECKE_OST		0x0400
101 #define HD64461_SYSSTBCR_SLCKE_OST		0x0200
102 #define HD64461_SYSSTBCR_SMIAST			0x0100
103 #define HD64461_SYSSTBCR_SLCDST			0x0080
104 #define HD64461_SYSSTBCR_SPC0ST			0x0040
105 #define HD64461_SYSSTBCR_SPC1ST			0x0020
106 #define HD64461_SYSSTBCR_SAFEST			0x0010
107 #define HD64461_SYSSTBCR_STM0ST			0x0008
108 #define HD64461_SYSSTBCR_STM1ST			0x0004
109 #define HD64461_SYSSTBCR_SIRST			0x0002
110 #define HD64461_SYSSTBCR_SURTSD			0x0001
111 
112 /* System Configuration Register */
113 #define HD64461_SYSSYSCR_REG16				0xb0000002
114 #define HD64461_SYSSYSCR_SCPU_BUS_IGAT		0x2000
115 #define HD64461_SYSSYSCR_SPTA_IR		0x0080
116 #define HD64461_SYSSYSCR_SPTA_TM		0x0040
117 #define HD64461_SYSSYSCR_SPTB_UR		0x0020
118 #define HD64461_SYSSYSCR_WAIT_CTL_SEL		0x0010
119 #define HD64461_SYSSYSCR_SMODE1			0x0002
120 #define HD64461_SYSSYSCR_SMODE0			0x0001
121 
122 /* CPU Data Bus Control Register */
123 #define HD64461_SYSSCPUCR_REG16				0xb0000004
124 #define HD64461_SYSSCPUCR_SPDSTOF		0x8000
125 #define HD64461_SYSSCPUCR_SPDSTIG		0x4000
126 #define HD64461_SYSSCPUCR_SPCSTOF		0x2000
127 #define HD64461_SYSSCPUCR_SPCSTIG		0x1000
128 #define HD64461_SYSSCPUCR_SPBSTOF		0x0800
129 #define HD64461_SYSSCPUCR_SPBSTIG		0x0400
130 #define HD64461_SYSSCPUCR_SPASTOF		0x0200
131 #define HD64461_SYSSCPUCR_SPASTIG		0x0100
132 #define HD64461_SYSSCPUCR_SLCDSTIG		0x0080
133 #define HD64461_SYSSCPUCR_SCPU_CS56_EP		0x0040
134 #define HD64461_SYSSCPUCR_SCPU_CMD_EP		0x0020
135 #define HD64461_SYSSCPUCR_SCPU_ADDR_EP		0x0010
136 #define HD64461_SYSSCPUCR_SCPDPU		0x0008
137 #define HD64461_SYSSCPUCR_SCPU_A2319_EP		0x0001
138