1/* $NetBSD: hd6446x_subr.S,v 1.7 2008/04/28 20:23:22 martin Exp $ */ 2 3/*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <sh3/asm.h> 33#include <hpcsh/dev/hd6446x/hd6446xintcreg.h> 34 35/* 36 * LINTSTUB: Func: int hd6446x_intr_raise(int s) 37 * raise SR.IMASK and HD6446x ICU interrupt mask to 's'. 38 * if current SR.IMASK is greater equal 's',nothing to do. 39 * Returns previous SR.IMASK. 40 */ 41NENTRY(hd6446x_intr_raise) 42 stc sr, r2 43 mov #0x78, r1 44 mov r2, r0 45 shll r1 /* r1 = 0xf0 */ 46 and r1, r0 /* r0 = SR & 0xf0 */ 47 cmp/ge r4, r0 /* r0 >= r4 ? T = 1 */ 48 bt/s 1f 49 not r1, r1 /* r1 = 0xffffff0f */ 50 and r1, r2 /* r2 = SR & ~0xf0 */ 51 or r4, r2 /* r2 = (SR & ~0xf0) | s */ 52 ldc r2, sr /* SR = r2 */ 53 shlr2 r4 54 shlr r4 55 mov.l 2f, r1 56 add r4, r1 57 mov.w @r1, r2 /* r2 = hd6446x_imask[s >> 4] */ 58 mov.l 3f, r1 59 mov.w r2, @r1 /* Set new interrupt mask to HD6446x */ 601: rts 61 nop /* return (SR & 0xf0) */ 62 63 .align 2 642: .long _C_LABEL(hd6446x_imask) 653: .long HD6446X_NIMR 66 67 SET_ENTRY_SIZE(hd6446x_intr_raise) 68 69 70/* 71 * LINTSTUB: Func: int hd6446x_intr_resume(int s) 72 * Set SR.IMASK and HD6446x interrupt mask register to 73 * 's' interrupt level. Returns previous SR.IMASK. 74 */ 75NENTRY(hd6446x_intr_resume) 76 mov r4, r0 77 shlr2 r0 78 shlr r0 79 mov.l 2f, r1 80 add r0, r1 81 mov.w @r1, r2 /* r2 = hd6446x_imask[s >> 4] */ 82 mov.l 3f, r1 83 mov.w r2, @r1 /* Set new interrupt mask to HD6446x */ 84 stc sr, r0 /* r0 = SR */ 85 mov #0x78, r2 86 shll r2 /* r2 = 0x000000f0 */ 87 not r2, r1 /* r1 = 0xffffff0f */ 88 and r0, r1 /* r1 = (SR & ~0xf0) */ 89 or r1, r4 /* r4 = (SR & ~0xf0) | level */ 90 ldc r4, sr /* Set new IMASK to SR */ 91 rts 92 and r2, r0 /* return (SR & 0xf0) */ 93 94 .align 2 952: .long _C_LABEL(hd6446x_imask) 963: .long HD6446X_NIMR 97 98 SET_ENTRY_SIZE(hd6446x_intr_resume) 99