xref: /netbsd/sys/arch/hpcsh/dev/hd6446x/hd6446xintc.c (revision bf9ec67e)
1 /*	$NetBSD: hd6446xintc.c,v 1.1 2002/03/28 15:27:04 uch Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 
42 #include <sh3/devreg.h>
43 #include <hpcsh/dev/hd6446x/hd6446xintcvar.h>
44 #include <hpcsh/dev/hd6446x/hd6446xintcreg.h>
45 
46 struct hd6446x_intrhand hd6446x_intrhand[_HD6446X_INTR_N];
47 u_int16_t hd6446x_imask[_IPL_N];
48 u_int16_t hd6446x_ienable;
49 void hd6446x_intr_priority_update(void);
50 
51 void
52 hd6446x_intr_init()
53 {
54 
55 	/* Initialize interrupt priority masks. */
56 	hd6446x_intr_priority_update();
57 }
58 
59 void *
60 hd6446x_intr_establish(int irq, int mode, int level,
61     int (*func)(void *), void *arg)
62 {
63 	struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1];
64 	u_int16_t r;
65 	int s;
66 
67 	s = splhigh();
68 
69 	/* Register interrupt handler */
70 	hh->hh_func = func;
71 	hh->hh_arg = arg;
72 	hh->hh_ipl = level << 4;
73 	hh->hh_imask = irq;
74 	hd6446x_ienable |= hh->hh_imask;
75 
76 	/* Update interrupt priority masks. */
77 	hd6446x_intr_priority_update();
78 
79 	/* Enable interrupt */
80 	r = _reg_read_2(HD6446X_NIMR);
81 	r &= ~hh->hh_imask;
82 	_reg_write_2(HD6446X_NIMR, r);
83 
84 	splx(s);
85 
86 	return (hh);
87 }
88 
89 void
90 hd6446x_intr_disestablish(void *handle)
91 {
92 	struct hd6446x_intrhand *hh = handle;
93 	u_int16_t r;
94 	int s;
95 
96 	s = splhigh();
97 
98 	/* Disable interrupt */
99 	r = _reg_read_2(HD6446X_NIMR);
100 	r |= hh->hh_imask;
101 	_reg_write_2(HD6446X_NIMR, r);
102 
103 	/* Update interrupt priority masks */
104 	hd6446x_ienable &= ~hh->hh_imask;
105 	memset(hh, 0, sizeof(*hh));
106 	hd6446x_intr_priority_update();
107 
108 	splx(s);
109 }
110 
111 void
112 hd6446x_intr_priority(int irq, int level)
113 {
114 	struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1];
115 	int s;
116 
117 	KDASSERT(hh->hh_func != NULL);
118 	s = splhigh();
119 	hh->hh_ipl = level << 4;
120 	hd6446x_intr_priority_update();
121 	splx(s);
122 }
123 
124 void
125 hd6446x_intr_priority_update()
126 {
127 	struct hd6446x_intrhand *hh;
128 	int irq, ipl;
129 	u_int16_t mask;
130 
131 	/* I assume interrupt level is splhigh */
132 	for (ipl = 0; ipl < _IPL_N; ipl++) {
133 		hh = hd6446x_intrhand;
134 		mask = 0;
135 		for (irq = 0; irq < _HD6446X_INTR_N; irq++, hh++) {
136 			if (hh->hh_func == NULL)
137 				continue;
138 			if (hh->hh_ipl == (ipl << 4))
139 				mask |= 1 << irq;
140 		}
141 		hd6446x_imask[ipl] = mask | ~hd6446x_ienable;
142 	}
143 
144 	for (ipl = 1; ipl < _IPL_N; ipl++)
145 		hd6446x_imask[ipl] |= hd6446x_imask[ipl - 1];
146 }
147