xref: /netbsd/sys/arch/hpcsh/include/intr.h (revision 9c4e14a7)
1*9c4e14a7Sryo /*	$NetBSD: intr.h,v 1.14 2021/11/02 11:26:04 ryo Exp $	*/
2e8300f36Such 
3e8300f36Such /*-
4e8300f36Such  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5e8300f36Such  * All rights reserved.
6e8300f36Such  *
7e8300f36Such  * Redistribution and use in source and binary forms, with or without
8e8300f36Such  * modification, are permitted provided that the following conditions
9e8300f36Such  * are met:
10e8300f36Such  * 1. Redistributions of source code must retain the above copyright
11e8300f36Such  *    notice, this list of conditions and the following disclaimer.
12e8300f36Such  * 2. Redistributions in binary form must reproduce the above copyright
13e8300f36Such  *    notice, this list of conditions and the following disclaimer in the
14e8300f36Such  *    documentation and/or other materials provided with the distribution.
15e8300f36Such  *
16e8300f36Such  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17e8300f36Such  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18e8300f36Such  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19e8300f36Such  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20e8300f36Such  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21e8300f36Such  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22e8300f36Such  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23e8300f36Such  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24e8300f36Such  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25e8300f36Such  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26e8300f36Such  * POSSIBILITY OF SUCH DAMAGE.
27e8300f36Such  */
28e8300f36Such 
292f13dfd8Such #ifndef _HPCSH_INTR_H_
302f13dfd8Such #define _HPCSH_INTR_H_
31ef1a3ce5Sitojun 
32ef1a3ce5Sitojun #include <sh3/intr.h>
33ef1a3ce5Sitojun 
34ffb8ffc1Suwe /*
35ffb8ffc1Suwe  * See sys/arch/sh3/sh3/interrupt.c
36ffb8ffc1Suwe  * This was 8 for TMU0, TMU1, TMU2, SCIF * 4, HD6446x.
37ffb8ffc1Suwe  *
38ffb8ffc1Suwe  * For now bump this to 16 so that it's possible to do experiments
39ffb8ffc1Suwe  * with new drivers without hitting this limit.
40ffb8ffc1Suwe  */
41ffb8ffc1Suwe #define _INTR_N		16
42ef1a3ce5Sitojun 
434b293a84Sad #define	IPL_VM		11
444b293a84Sad #define	IPL_SCHED	14
45e8300f36Such #define	IPL_HIGH	15	/* everything */
46ef1a3ce5Sitojun 
47260c29f0Such #include <hpcsh/dev/hd6446x/hd6446xintcvar.h>
48260c29f0Such 
49b07ec3fcSad typedef uint8_t ipl_t;
508bf76628Syamt typedef struct {
518bf76628Syamt 	ipl_t _ipl;
528bf76628Syamt } ipl_cookie_t;
538bf76628Syamt 
54*9c4e14a7Sryo static inline __always_inline ipl_cookie_t
makeiplcookie(ipl_t ipl)558bf76628Syamt makeiplcookie(ipl_t ipl)
568bf76628Syamt {
578bf76628Syamt 
588bf76628Syamt 	return (ipl_cookie_t){._ipl = ipl << 4};
598bf76628Syamt }
608bf76628Syamt 
61*9c4e14a7Sryo static inline __always_inline int
splraiseipl(ipl_cookie_t icookie)628bf76628Syamt splraiseipl(ipl_cookie_t icookie)
638bf76628Syamt {
648bf76628Syamt 
658bf76628Syamt 	return hd6446x_intr_raise(icookie._ipl);
668bf76628Syamt }
678bf76628Syamt 
688bf76628Syamt #include <sys/spl.h>
69ef1a3ce5Sitojun 
70260c29f0Such #define	spl0()			hd6446x_intr_resume(0)
71260c29f0Such #define	splx(x)			hd6446x_intr_resume(x)
72ef1a3ce5Sitojun 
73e8300f36Such #endif /* !_HPCSH_INTR_H_ */
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