xref: /netbsd/sys/arch/hppa/hppa/support.S (revision c4a72b64)
1/*	$NetBSD: support.S,v 1.1 2002/06/05 01:04:20 fredette Exp $	*/
2
3/*	$OpenBSD: locore.S,v 1.46 2001/09/20 18:33:03 mickey Exp $	*/
4
5/*
6 * Copyright (c) 1998-2001 Michael Shalayeff
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *      This product includes software developed by Michael Shalayeff.
20 * 4. The name of the author may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
31 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * Portitions of this file are derived from other sources, see
36 * the copyrights and acknowledgements below.
37 */
38/*
39 * Copyright (c) 1990,1991,1992,1994 The University of Utah and
40 * the Computer Systems Laboratory (CSL).  All rights reserved.
41 *
42 * THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
44 * WHATSOEVER RESULTING FROM ITS USE.
45 *
46 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
47 * improvements that they make and grant CSL redistribution rights.
48 *
49 *	Utah $Hdr: locore.s 1.62 94/12/15$
50 */
51/*
52 *  (c) Copyright 1988 HEWLETT-PACKARD COMPANY
53 *
54 *  To anyone who acknowledges that this file is provided "AS IS"
55 *  without any express or implied warranty:
56 *      permission to use, copy, modify, and distribute this file
57 *  for any purpose is hereby granted without fee, provided that
58 *  the above copyright notice and this notice appears in all
59 *  copies, and that the name of Hewlett-Packard Company not be
60 *  used in advertising or publicity pertaining to distribution
61 *  of the software without specific, written prior permission.
62 *  Hewlett-Packard Company makes no representations about the
63 *  suitability of this software for any purpose.
64 */
65
66/*
67 * NOTICE: This is not a standalone file.  To use it, #include it in
68 * your port's locore.S, like so:
69 *
70 *      #include <hppa/hppa/support.S>
71 */
72
73/*
74 * Miscellaneous support routines common to all hppa ports.
75 */
76
77/*
78 * void fdcache(pa_space_t sp, vaddr_t va, vsize_t size);
79 */
80	.import	dcache_stride, data
81LEAF_ENTRY(fdcache)
82	ldil	L%dcache_stride,t1
83	ldw	R%dcache_stride(t1), arg3
84
85	comb,=	arg2, r0, fdc_none	/* no bytes, no flush */
86
87	mtsp	arg0, sr1		/* move the space register to sr1 */
88	add	arg1, arg2, arg0	/* get the last byte to flush in arg0 */
89
90	zdep	arg3, 27, 28, t1	/* get size of a 16X loop in t1 */
91	comb,<	arg2, t1, fdc_short	/* check for count < 16 * stride */
92	addi	-1, t1, t1		/* compute size of large loop - 1 */
93
94	andcm	arg2, t1, t1		/* L = count - (count mod lenbigloop) */
95	add	arg1, t1, t1		/* ub for big loop is lb + L */
96
97	fdc,m	arg3(sr1, arg1)		/* Start flushing first cache line. */
98fdc_long
99	fdc,m	arg3(sr1, arg1)
100	fdc,m	arg3(sr1, arg1)
101	fdc,m	arg3(sr1, arg1)
102	fdc,m	arg3(sr1, arg1)
103	fdc,m	arg3(sr1, arg1)
104	fdc,m	arg3(sr1, arg1)
105	fdc,m	arg3(sr1, arg1)
106	fdc,m	arg3(sr1, arg1)
107	fdc,m	arg3(sr1, arg1)
108	fdc,m	arg3(sr1, arg1)
109	fdc,m	arg3(sr1, arg1)
110	fdc,m	arg3(sr1, arg1)
111	fdc,m	arg3(sr1, arg1)
112	fdc,m	arg3(sr1, arg1)
113	fdc,m	arg3(sr1, arg1)
114	comb,<<,n arg1, t1, fdc_long
115	fdc,m	arg3(sr1, arg1)
116fdc_short				/* flush one line at a time */
117	comb,<<,n arg1, arg0, fdc_short
118	fdc,m	arg3(sr1, arg1)
119
120	addi	-1, arg0, arg1
121	fdc	r0(sr1, arg1)
122
123fdc_none
124	sync
125	syncdma
126	bv	r0(r2)
127	sync
128EXIT(fdcache)
129
130/*
131 * void pdcache(pa_space_t sp, vaddr_t va, vsize_t size);
132 */
133	.import	dcache_stride, data
134LEAF_ENTRY(pdcache)
135	ldil	L%dcache_stride,t1
136	ldw	R%dcache_stride(t1), arg3
137
138	comb,=	arg2, r0, pdc_none	/* no bytes, no purge */
139
140	mtsp	arg0, sr1		/* move the space register to sr1 */
141	add	arg1, arg2, arg0	/* get the last byte to flush in arg0 */
142
143	zdep	arg3, 27, 28, t1	/* get size of a 16X loop in t1 */
144	comb,<	arg2, t1, pdc_short	/* check for count < 16 * stride */
145	addi	-1, t1, t1		/* compute size of large loop - 1 */
146
147	andcm	arg2, t1, t1		/* L = count - (count mod lenbigloop) */
148	add	arg1, t1, t1		/* ub for big loop is lb + L */
149
150	pdc,m	arg3(sr1, arg1)		/* Start flushing first cache line. */
151pdc_long
152	pdc,m	arg3(sr1, arg1)
153	pdc,m	arg3(sr1, arg1)
154	pdc,m	arg3(sr1, arg1)
155	pdc,m	arg3(sr1, arg1)
156	pdc,m	arg3(sr1, arg1)
157	pdc,m	arg3(sr1, arg1)
158	pdc,m	arg3(sr1, arg1)
159	pdc,m	arg3(sr1, arg1)
160	pdc,m	arg3(sr1, arg1)
161	pdc,m	arg3(sr1, arg1)
162	pdc,m	arg3(sr1, arg1)
163	pdc,m	arg3(sr1, arg1)
164	pdc,m	arg3(sr1, arg1)
165	pdc,m	arg3(sr1, arg1)
166	pdc,m	arg3(sr1, arg1)
167	comb,<<,n arg1, t1, pdc_long
168	pdc,m	arg3(sr1, arg1)
169pdc_short				/* flush one line at a time */
170	comb,<<,n arg1, arg0, pdc_short
171	pdc,m	arg3(sr1, arg1)
172
173	addi	-1, arg0, arg1
174	pdc	r0(sr1, arg1)
175
176pdc_none
177	sync
178	syncdma
179	bv	r0(r2)
180	sync
181EXIT(pdcache)
182
183/*
184 * void ficache(pa_space_t sp, vaddr_t va, vsize_t size);
185 */
186	.import	icache_stride, data
187LEAF_ENTRY(ficache)
188	ldil	L%icache_stride,t1
189	ldw	R%icache_stride(t1), arg3
190
191	comb,=	arg2, r0, fic_none	/* no bytes, no flush */
192
193	mtsp	arg0, sr1		/* move the space register to sr1 */
194	add	arg1, arg2, arg0	/* get the last byte to flush in arg0 */
195
196	zdep	arg3, 27, 28, t1	/* get size of a 16X loop in t1 */
197	comb,<	arg2, t1, fic_short	/* check for count < 16 * stride */
198	addi	-1, t1, t1		/* compute size of large loop - 1 */
199
200	andcm	arg2, t1, t1		/* L = count - (count mod lenbigloop) */
201	add	arg1, t1, t1		/* ub for big loop is lb + L */
202
203	fic,m	arg3(sr1, arg1)		/* Start flushing first cache line. */
204fic_long
205	fic,m	arg3(sr1, arg1)
206	fic,m	arg3(sr1, arg1)
207	fic,m	arg3(sr1, arg1)
208	fic,m	arg3(sr1, arg1)
209	fic,m	arg3(sr1, arg1)
210	fic,m	arg3(sr1, arg1)
211	fic,m	arg3(sr1, arg1)
212	fic,m	arg3(sr1, arg1)
213	fic,m	arg3(sr1, arg1)
214	fic,m	arg3(sr1, arg1)
215	fic,m	arg3(sr1, arg1)
216	fic,m	arg3(sr1, arg1)
217	fic,m	arg3(sr1, arg1)
218	fic,m	arg3(sr1, arg1)
219	fic,m	arg3(sr1, arg1)
220	comb,<<,n arg1, t1, fic_long
221	fic,m	arg3(sr1, arg1)
222fic_short				/* flush one line at a time */
223	comb,<<,n arg1, arg0, fic_short
224	fic,m	arg3(sr1, arg1)
225
226	addi	-1, arg0, arg1
227	fic	r0(sr1, arg1)
228
229fic_none
230	sync
231	syncdma
232	bv	r0(r2)
233	sync
234EXIT(ficache)
235
236
237LEAF_ENTRY(setjmp)
238/*
239 * Save the other general registers whose contents are expected to remain
240 * across function calls.  According to the "HP9000 Series 800 Assembly
241 * Language Reference Manual", procedures can use general registers 19-26,
242 * 28, 29, 1, and 31 without restoring them.  Hence, we do not save these.
243 */
244	stwm	r3,4(arg0)
245	stwm	r4,4(arg0)
246	stwm	r5,4(arg0)
247	stwm	r6,4(arg0)
248	stwm	r7,4(arg0)
249	stwm	r8,4(arg0)
250	stwm	r9,4(arg0)
251	stwm	r10,4(arg0)
252	stwm	r11,4(arg0)
253	stwm	r12,4(arg0)
254	stwm	r13,4(arg0)
255	stwm	r14,4(arg0)
256	stwm	r15,4(arg0)
257	stwm	r16,4(arg0)
258	stwm	r17,4(arg0)
259	stwm	r18,4(arg0)
260	stwm	r27,4(arg0)	/* Good idea to save the data pointer (dp) */
261	stwm	rp,4(arg0)	/* Save the return pointer */
262	stwm	sp,4(arg0)	/* Save the original stack pointer */
263
264	bv	0(rp)
265	copy	r0, ret0
266EXIT(setjmp)
267
268LEAF_ENTRY(longjmp)
269/*
270 * Restore general registers.
271 */
272	ldwm	4(arg0),r3
273	ldwm	4(arg0),r4
274	ldwm	4(arg0),r5
275	ldwm	4(arg0),r6
276	ldwm	4(arg0),r7
277	ldwm	4(arg0),r8
278	ldwm	4(arg0),r9
279	ldwm	4(arg0),r10
280	ldwm	4(arg0),r11
281	ldwm	4(arg0),r12
282	ldwm	4(arg0),r13
283	ldwm	4(arg0),r14
284	ldwm	4(arg0),r15
285	ldwm	4(arg0),r16
286	ldwm	4(arg0),r17
287	ldwm	4(arg0),r18
288	ldwm	4(arg0),r27
289	ldwm	4(arg0),rp	/* Restore return address pointer, */
290	ldwm	4(arg0),sp	/* stack pointer, */
291
292	bv	0(rp)
293	copy	arg1,ret0	/* Move return value to where it belongs. */
294EXIT(longjmp)
295
296