xref: /netbsd/sys/arch/i386/include/i8259.h (revision c4a72b64)
1 /*	$NetBSD: i8259.h,v 1.1 2002/11/22 15:23:47 fvdl Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the University of
21  *	California, Berkeley and its contributors.
22  * 4. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	@(#)icu.h	5.6 (Berkeley) 5/9/91
39  */
40 
41 #ifndef	_I386_I8259_H_
42 #define	_I386_I8259_H_
43 
44 #include <dev/isa/isareg.h>
45 
46 #ifndef	_LOCORE
47 
48 /*
49  * Interrupt "level" mechanism variables, masks, and macros
50  */
51 extern	unsigned i8259_imen;		/* interrupt mask enable */
52 extern unsigned i8259_setmask(unsigned);
53 
54 #define SET_ICUS()	(outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
55 
56 extern void i8259_default_setup(void);
57 extern void i8259_reinit(void);
58 
59 #endif /* !_LOCORE */
60 
61 /*
62  * Interrupt enable bits -- in order of priority
63  */
64 #define	IRQ_SLAVE	2
65 
66 /*
67  * Interrupt Control offset into Interrupt descriptor table (IDT)
68  */
69 #define	ICU_OFFSET	32		/* 0-31 are processor exceptions */
70 #define	ICU_LEN		16		/* 32-47 are ISA interrupts */
71 
72 
73 #define ICU_HARDWARE_MASK
74 
75 /*
76  * These macros are fairly self explanatory.  If ICU_SPECIAL_MASK_MODE is
77  * defined, we try to take advantage of the ICU's `special mask mode' by only
78  * EOIing the interrupts on return.  This avoids the requirement of masking and
79  * unmasking.  We can't do this without special mask mode, because the ICU
80  * would also hold interrupts that it thinks are of lower priority.
81  *
82  * Many machines do not support special mask mode, so by default we don't try
83  * to use it.
84  */
85 
86 #define	IRQ_BIT(num)	(1 << ((num) % 8))
87 #define	IRQ_BYTE(num)	((num) >> 3)
88 
89 #define i8259_late_ack(num)
90 
91 #ifdef ICU_SPECIAL_MASK_MODE
92 
93 #define	i8259_asm_ack1(num)
94 #define	i8259_asm_ack2(num) \
95 	movb	$(0x60|IRQ_SLAVE),%al	/* specific EOI for IRQ2 */	;\
96 	outb	%al,$IO_ICU1
97 #define	i8259_asm_mask(num)
98 #define	i8259_asm_unmask(num) \
99 	movb	$(0x60|(num%8)),%al	/* specific EOI */		;\
100 	outb	%al,$ICUADDR
101 
102 #else /* ICU_SPECIAL_MASK_MODE */
103 
104 #ifndef	AUTO_EOI_1
105 #define	i8259_asm_ack1(num) \
106 	movb	$(0x60|(num%8)),%al	/* specific EOI */		;\
107 	outb	%al,$IO_ICU1
108 #else
109 #define	i8259_asm_ack1(num)
110 #endif
111 
112 #ifndef AUTO_EOI_2
113 #define	i8259_asm_ack2(num) \
114 	movb	$(0x60|(num%8)),%al	/* specific EOI */		;\
115 	outb	%al,$IO_ICU2		/* do the second ICU first */	;\
116 	movb	$(0x60|IRQ_SLAVE),%al	/* specific EOI for IRQ2 */	;\
117 	outb	%al,$IO_ICU1
118 #else
119 #define	i8259_asm_ack2(num)
120 #endif
121 
122 #ifdef PIC_MASKDELAY
123 #define MASKDELAY	pushl %eax ; inb $0x84,%al ; popl %eax
124 #else
125 #define MASKDELAY
126 #endif
127 
128 #ifdef ICU_HARDWARE_MASK
129 
130 #define	i8259_asm_mask(num) \
131 	movb	_C_LABEL(i8259_imen) + IRQ_BYTE(num),%al		;\
132 	orb	$IRQ_BIT(num),%al					;\
133 	movb	%al,_C_LABEL(i8259_imen) + IRQ_BYTE(num)		;\
134 	MASKDELAY							;\
135 	outb	%al,$(ICUADDR+1)
136 #define	i8259_asm_unmask(num) \
137 	cli								;\
138 	movb	_C_LABEL(i8259_imen) + IRQ_BYTE(num),%al		;\
139 	andb	$~IRQ_BIT(num),%al					;\
140 	movb	%al,_C_LABEL(i8259_imen) + IRQ_BYTE(num)		;\
141 	MASKDELAY							;\
142 	outb	%al,$(ICUADDR+1)					;\
143 	sti
144 
145 #else /* ICU_HARDWARE_MASK */
146 
147 #define	i8259_asm_mask(num)
148 #define	i8259_asm_unmask(num)
149 
150 #endif /* ICU_HARDWARE_MASK */
151 #endif /* ICU_SPECIAL_MASK_MODE */
152 
153 #endif /* !_I386_I8259_H_ */
154