1 /* $NetBSD: amd756reg.h,v 1.1 2001/04/19 17:32:40 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Register definitions for the AMD756 Peripheral Bus Controller. 38 */ 39 40 /* 41 * Edge Triggered Interrupt Select register. (0x54) 42 * bits 7-4: reserved 43 * bit 3: Edge Triggered Interrupt Select for PCI Interrupt D 44 * bit 2: Edge Triggered Interrupt Select for PCI Interrupt C 45 * bit 1: Edge Triggered Interrupt Select for PCI Interrupt B 46 * bit 0: Edge Triggered Interrupt Select for PCI Interrupt A 47 * 0 = active Low and level triggered 48 * 1 = active High and edge triggered 49 * 50 * PIRQ Select register. (0x56-57) 51 * bits 15-12: PIRQD# Select 52 * bits 11-8: PIRQD# Select 53 * bits 7-4: PIRQD# Select 54 * bits 3-0: PIRQD# Select 55 * 0000: Reserved 0100: IRQ4 1000: Reserved 1100: IRQ12 56 * 0001: IRQ1 0101: IRQ5 1001: IRQ9 1101: Reserved 57 * 0010: Reserved 0110: IRQ6 1010: IRQ10 1110: IRQ14 58 * 0011: IRQ3 0111: IRQ7 1011: IRQ11 1111: IRQ15 59 */ 60 #define AMD756_CFG_PIR 0x54 61 62 #define AMD756_GET_EDGESEL(ph) \ 63 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 64 & 0xff) 65 66 #define AMD756_GET_PIIRQSEL(ph) \ 67 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 68 >> 16) 69 70 #define AMD756_SET_EDGESEL(ph, n) \ 71 pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \ 72 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 73 & 0xffff0000) | (n)) 74 75 #define AMD756_SET_PIIRQSEL(ph, n) \ 76 pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \ 77 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 78 & 0x000000ff) | ((n) << 16)) 79 80 #define AMD756_PIRQ_MASK 0xdefa 81 #define AMD756_LEGAL_LINK(link) ((link) >= 0 && (link) <= 3) 82 #define AMD756_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \ 83 ((1 << (irq)) & AMD756_PIRQ_MASK) != 0) 84