1 /* $NetBSD: opti82c558.c,v 1.3 2001/11/15 07:03:33 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * Support for the Opti 82c558 PCI-ISA bridge interrupt controller. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: opti82c558.c,v 1.3 2001/11/15 07:03:33 lukem Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/device.h> 75 #include <sys/malloc.h> 76 77 #include <machine/intr.h> 78 #include <machine/bus.h> 79 80 #include <dev/pci/pcivar.h> 81 #include <dev/pci/pcireg.h> 82 #include <dev/pci/pcidevs.h> 83 84 #include <i386/pci/pci_intr_fixup.h> 85 #include <i386/pci/opti82c558reg.h> 86 87 int opti82c558_getclink __P((pciintr_icu_handle_t, int, int *)); 88 int opti82c558_get_intr __P((pciintr_icu_handle_t, int, int *)); 89 int opti82c558_set_intr __P((pciintr_icu_handle_t, int, int)); 90 int opti82c558_get_trigger __P((pciintr_icu_handle_t, int, int *)); 91 int opti82c558_set_trigger __P((pciintr_icu_handle_t, int, int)); 92 93 const struct pciintr_icu opti82c558_pci_icu = { 94 opti82c558_getclink, 95 opti82c558_get_intr, 96 opti82c558_set_intr, 97 opti82c558_get_trigger, 98 opti82c558_set_trigger, 99 }; 100 101 struct opti82c558_handle { 102 pci_chipset_tag_t ph_pc; 103 pcitag_t ph_tag; 104 }; 105 106 static const int viper_pirq_decode[] = { 107 -1, 5, 9, 10, 11, 12, 14, 15 108 }; 109 110 static const int viper_pirq_encode[] = { 111 -1, /* 0 */ 112 -1, /* 1 */ 113 -1, /* 2 */ 114 -1, /* 3 */ 115 -1, /* 4 */ 116 VIPER_PIRQ_5, /* 5 */ 117 -1, /* 6 */ 118 -1, /* 7 */ 119 -1, /* 8 */ 120 VIPER_PIRQ_9, /* 9 */ 121 VIPER_PIRQ_10, /* 10 */ 122 VIPER_PIRQ_11, /* 11 */ 123 VIPER_PIRQ_12, /* 12 */ 124 -1, /* 13 */ 125 VIPER_PIRQ_14, /* 14 */ 126 VIPER_PIRQ_15, /* 15 */ 127 }; 128 129 int 130 opti82c558_init(pc, iot, tag, ptagp, phandp) 131 pci_chipset_tag_t pc; 132 bus_space_tag_t iot; 133 pcitag_t tag; 134 pciintr_icu_tag_t *ptagp; 135 pciintr_icu_handle_t *phandp; 136 { 137 struct opti82c558_handle *ph; 138 139 ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT); 140 if (ph == NULL) 141 return (1); 142 143 ph->ph_pc = pc; 144 ph->ph_tag = tag; 145 146 *ptagp = &opti82c558_pci_icu; 147 *phandp = ph; 148 return (0); 149 } 150 151 int 152 opti82c558_getclink(v, link, clinkp) 153 pciintr_icu_handle_t v; 154 int link, *clinkp; 155 { 156 157 if (VIPER_LEGAL_LINK(link - 1)) { 158 *clinkp = link - 1; 159 return (0); 160 } 161 162 return (1); 163 } 164 165 int 166 opti82c558_get_intr(v, clink, irqp) 167 pciintr_icu_handle_t v; 168 int clink, *irqp; 169 { 170 struct opti82c558_handle *ph = v; 171 pcireg_t reg; 172 int val; 173 174 if (VIPER_LEGAL_LINK(clink) == 0) 175 return (1); 176 177 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 178 val = VIPER_PIRQ(reg, clink); 179 *irqp = (val == VIPER_PIRQ_NONE) ? 180 I386_PCI_INTERRUPT_LINE_NO_CONNECTION : viper_pirq_decode[val]; 181 182 return (0); 183 } 184 185 int 186 opti82c558_set_intr(v, clink, irq) 187 pciintr_icu_handle_t v; 188 int clink, irq; 189 { 190 struct opti82c558_handle *ph = v; 191 int shift; 192 pcireg_t reg; 193 194 if (VIPER_LEGAL_LINK(clink) == 0 || VIPER_LEGAL_IRQ(irq) == 0) 195 return (1); 196 197 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 198 shift = VIPER_PIRQ_SELECT_SHIFT * clink; 199 reg &= ~(VIPER_PIRQ_SELECT_MASK << shift); 200 reg |= (viper_pirq_encode[irq] << shift); 201 pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg); 202 203 return (0); 204 } 205 206 int 207 opti82c558_get_trigger(v, irq, triggerp) 208 pciintr_icu_handle_t v; 209 int irq, *triggerp; 210 { 211 struct opti82c558_handle *ph = v; 212 pcireg_t reg; 213 214 if (VIPER_LEGAL_IRQ(irq) == 0) { 215 /* ISA IRQ? */ 216 *triggerp = IST_EDGE; 217 return (0); 218 } 219 220 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 221 if ((reg >> (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq])) & 1) 222 *triggerp = IST_LEVEL; 223 else 224 *triggerp = IST_EDGE; 225 226 return (0); 227 } 228 229 int 230 opti82c558_set_trigger(v, irq, trigger) 231 pciintr_icu_handle_t v; 232 int irq, trigger; 233 { 234 struct opti82c558_handle *ph = v; 235 int shift; 236 pcireg_t reg; 237 238 if (VIPER_LEGAL_IRQ(irq) == 0) { 239 /* ISA IRQ? */ 240 return ((trigger != IST_LEVEL) ? 0 : 1); 241 } 242 243 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 244 shift = (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq]); 245 if (trigger == IST_LEVEL) 246 reg |= (1 << shift); 247 else 248 reg &= ~(1 << shift); 249 pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg); 250 251 return (0); 252 } 253