1 /* $NetBSD: pci_intr_fixup.c,v 1.19 2001/12/07 08:07:57 onoe Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * PCI Interrupt Router support. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.19 2001/12/07 08:07:57 onoe Exp $"); 71 72 #include "opt_pcibios.h" 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/malloc.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <i386/isa/icu.h> 89 #include <i386/pci/pci_intr_fixup.h> 90 #include <i386/pci/pcibios.h> 91 92 struct pciintr_link_map { 93 int link; 94 int clink; 95 int irq; 96 u_int16_t bitmap; 97 int fixup_stage; 98 SIMPLEQ_ENTRY(pciintr_link_map) list; 99 }; 100 101 pciintr_icu_tag_t pciintr_icu_tag; 102 pciintr_icu_handle_t pciintr_icu_handle; 103 104 #ifdef PCIBIOS_IRQS_HINT 105 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 106 #endif 107 108 struct pciintr_link_map *pciintr_link_lookup __P((int)); 109 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *, 110 int)); 111 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int)); 112 static int pciintr_bitmap_count_irq __P((int, int *)); 113 static int pciintr_bitmap_find_lowest_irq __P((int, int *)); 114 int pciintr_link_init __P((void)); 115 #ifdef PCIBIOS_INTR_GUESS 116 int pciintr_guess_irq __P((void)); 117 #endif 118 int pciintr_link_fixup __P((void)); 119 int pciintr_link_route __P((u_int16_t *)); 120 int pciintr_irq_release __P((u_int16_t *)); 121 int pciintr_header_fixup __P((pci_chipset_tag_t)); 122 void pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*)); 123 124 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 125 126 const struct pciintr_icu_table { 127 pci_vendor_id_t piit_vendor; 128 pci_product_id_t piit_product; 129 int (*piit_init) __P((pci_chipset_tag_t, 130 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 131 pciintr_icu_handle_t *)); 132 } pciintr_icu_table[] = { 133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 134 piix_init }, 135 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 136 piix_init }, 137 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 138 piix_init }, 139 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 140 piix_init }, 141 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 142 piix_init }, 143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 144 piix_init }, 145 146 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 147 opti82c558_init }, 148 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 149 opti82c700_init }, 150 151 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 152 via82c586_init }, 153 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 154 via82c586_init }, 155 156 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 157 sis85c503_init }, 158 159 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 160 amd756_init }, 161 162 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 163 ali1543_init }, 164 165 { 0, 0, 166 NULL }, 167 }; 168 169 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t)); 170 171 const struct pciintr_icu_table * 172 pciintr_icu_lookup(id) 173 pcireg_t id; 174 { 175 const struct pciintr_icu_table *piit; 176 177 for (piit = pciintr_icu_table; 178 piit->piit_init != NULL; 179 piit++) { 180 if (PCI_VENDOR(id) == piit->piit_vendor && 181 PCI_PRODUCT(id) == piit->piit_product) 182 return (piit); 183 } 184 185 return (NULL); 186 } 187 188 struct pciintr_link_map * 189 pciintr_link_lookup(link) 190 int link; 191 { 192 struct pciintr_link_map *l; 193 194 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 195 l = SIMPLEQ_NEXT(l, list)) { 196 if (l->link == link) 197 return (l); 198 } 199 200 return (NULL); 201 } 202 203 struct pciintr_link_map * 204 pciintr_link_alloc(pir, pin) 205 struct pcibios_intr_routing *pir; 206 int pin; 207 { 208 int link = pir->linkmap[pin].link, clink, irq; 209 struct pciintr_link_map *l, *lstart; 210 211 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 212 /* 213 * Get the canonical link value for this entry. 214 */ 215 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 216 link, &clink) != 0) { 217 /* 218 * ICU doesn't understand the link value. 219 * Just ignore this PIR entry. 220 */ 221 #ifdef DIAGNOSTIC 222 printf("pciintr_link_alloc: bus %d device %d: " 223 "link 0x%02x invalid\n", 224 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link); 225 #endif 226 return (NULL); 227 } 228 229 /* 230 * Check the link value by asking the ICU for the 231 * canonical link value. 232 * Also, determine if this PIRQ is mapped to an IRQ. 233 */ 234 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 235 clink, &irq) != 0) { 236 /* 237 * ICU doesn't understand the canonical link value. 238 * Just ignore this PIR entry. 239 */ 240 #ifdef DIAGNOSTIC 241 printf("pciintr_link_alloc: " 242 "bus %d device %d link 0x%02x: " 243 "PIRQ 0x%02x invalid\n", 244 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, 245 clink); 246 #endif 247 return (NULL); 248 } 249 } 250 251 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT); 252 if (l == NULL) 253 panic("pciintr_link_alloc"); 254 255 memset(l, 0, sizeof(*l)); 256 257 l->link = link; 258 l->bitmap = pir->linkmap[pin].bitmap; 259 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 260 l->clink = clink; 261 l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */ 262 } else { 263 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */ 264 l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 265 } 266 267 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 268 if (lstart == NULL || lstart->link < l->link) 269 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 270 else 271 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 272 273 return (l); 274 } 275 276 struct pcibios_intr_routing * 277 pciintr_pir_lookup(bus, device) 278 int bus, device; 279 { 280 struct pcibios_intr_routing *pir; 281 int entry; 282 283 if (pcibios_pir_table == NULL) 284 return (NULL); 285 286 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 287 pir = &pcibios_pir_table[entry]; 288 if (pir->bus == bus && 289 PIR_DEVFUNC_DEVICE(pir->device) == device) 290 return (pir); 291 } 292 293 return (NULL); 294 } 295 296 static int 297 pciintr_bitmap_count_irq(irq_bitmap, irqp) 298 int irq_bitmap, *irqp; 299 { 300 int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 301 302 if (irq_bitmap != 0) { 303 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 304 if (irq_bitmap & bit) { 305 irq = i; 306 count++; 307 } 308 } 309 } 310 *irqp = irq; 311 return (count); 312 } 313 314 static int 315 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp) 316 int irq_bitmap, *irqp; 317 { 318 int i, bit; 319 320 if (irq_bitmap != 0) { 321 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 322 if (irq_bitmap & bit) { 323 *irqp = i; 324 return (1); /* found */ 325 } 326 } 327 } 328 return (0); /* not found */ 329 } 330 331 int 332 pciintr_link_init() 333 { 334 int entry, pin, link; 335 struct pcibios_intr_routing *pir; 336 struct pciintr_link_map *l; 337 338 if (pcibios_pir_table == NULL) { 339 /* No PIR table; can't do anything. */ 340 printf("pciintr_link_init: no PIR table\n"); 341 return (1); 342 } 343 344 SIMPLEQ_INIT(&pciintr_link_map_list); 345 346 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 347 pir = &pcibios_pir_table[entry]; 348 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 349 link = pir->linkmap[pin].link; 350 if (link == 0) { 351 /* No connection for this pin. */ 352 continue; 353 } 354 /* 355 * Multiple devices may be wired to the same 356 * interrupt; check to see if we've seen this 357 * one already. If not, allocate a new link 358 * map entry and stuff it in the map. 359 */ 360 l = pciintr_link_lookup(link); 361 if (l == NULL) { 362 (void) pciintr_link_alloc(pir, pin); 363 } else if (pir->linkmap[pin].bitmap != l->bitmap) { 364 /* 365 * violates PCI IRQ Routing Table Specification 366 */ 367 #ifdef DIAGNOSTIC 368 printf("pciintr_link_init: " 369 "bus %d device %d link 0x%02x: " 370 "bad irq bitmap 0x%04x, " 371 "should be 0x%04x\n", 372 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), 373 link, pir->linkmap[pin].bitmap, l->bitmap); 374 #endif 375 /* safer value. */ 376 l->bitmap &= pir->linkmap[pin].bitmap; 377 /* XXX - or, should ignore this entry? */ 378 } 379 } 380 } 381 382 return (0); 383 } 384 385 #ifdef PCIBIOS_INTR_GUESS 386 /* 387 * No compatible PCI ICU found. 388 * Hopes the BIOS already setup the ICU. 389 */ 390 int 391 pciintr_guess_irq() 392 { 393 struct pciintr_link_map *l; 394 int irq, guessed = 0; 395 396 /* 397 * Stage 1: If only one IRQ is available for the link, use it. 398 */ 399 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 400 l = SIMPLEQ_NEXT(l, list)) { 401 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 402 continue; 403 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 404 l->irq = irq; 405 l->fixup_stage = 1; 406 #ifdef PCIINTR_DEBUG 407 printf("pciintr_guess_irq (stage 1): " 408 "guessing PIRQ 0x%02x to be IRQ %d\n", 409 l->clink, l->irq); 410 #endif 411 guessed = 1; 412 } 413 } 414 415 return (guessed ? 0 : -1); 416 } 417 #endif /* PCIBIOS_INTR_GUESS */ 418 419 int 420 pciintr_link_fixup() 421 { 422 struct pciintr_link_map *l; 423 int irq; 424 u_int16_t pciirq = 0; 425 426 /* 427 * First stage: Attempt to connect PIRQs which aren't 428 * yet connected. 429 */ 430 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 431 l = SIMPLEQ_NEXT(l, list)) { 432 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 433 /* 434 * Interrupt is already connected. Don't do 435 * anything to it. 436 * In this case, l->fixup_stage == 0. 437 */ 438 pciirq |= 1 << l->irq; 439 #ifdef PCIINTR_DEBUG 440 printf("pciintr_link_fixup: PIRQ 0x%02x already " 441 "connected to IRQ %d\n", l->clink, l->irq); 442 #endif 443 continue; 444 } 445 /* 446 * Interrupt isn't connected. Attempt to assign it to an IRQ. 447 */ 448 #ifdef PCIINTR_DEBUG 449 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 450 l->clink); 451 #endif 452 /* 453 * Just do the easy case now; we'll defer the harder ones 454 * to Stage 2. 455 */ 456 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 457 l->irq = irq; 458 l->fixup_stage = 1; 459 pciirq |= 1 << irq; 460 #ifdef PCIINTR_DEBUG 461 printf(", assigning IRQ %d", l->irq); 462 #endif 463 } 464 #ifdef PCIINTR_DEBUG 465 printf("\n"); 466 #endif 467 } 468 469 /* 470 * Stage 2: Attempt to connect PIRQs which we didn't 471 * connect in Stage 1. 472 */ 473 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 474 l = SIMPLEQ_NEXT(l, list)) { 475 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 476 continue; 477 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq, 478 &l->irq)) { 479 /* 480 * This IRQ is a valid PCI IRQ already 481 * connected to another PIRQ, and also an 482 * IRQ our PIRQ can use; connect it up! 483 */ 484 l->fixup_stage = 2; 485 #ifdef PCIINTR_DEBUG 486 printf("pciintr_link_fixup (stage 2): " 487 "assigning IRQ %d to PIRQ 0x%02x\n", 488 l->irq, l->clink); 489 #endif 490 } 491 } 492 493 #ifdef PCIBIOS_IRQS_HINT 494 /* 495 * Stage 3: The worst case. I need configuration hint that 496 * user supplied a mask for the PCI irqs 497 */ 498 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 499 l = SIMPLEQ_NEXT(l, list)) { 500 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 501 continue; 502 if (pciintr_bitmap_find_lowest_irq( 503 l->bitmap & pcibios_irqs_hint, &l->irq)) { 504 l->fixup_stage = 3; 505 #ifdef PCIINTR_DEBUG 506 printf("pciintr_link_fixup (stage 3): " 507 "assigning IRQ %d to PIRQ 0x%02x\n", 508 l->irq, l->clink); 509 #endif 510 } 511 } 512 #endif /* PCIBIOS_IRQS_HINT */ 513 514 return (0); 515 } 516 517 int 518 pciintr_link_route(pciirq) 519 u_int16_t *pciirq; 520 { 521 struct pciintr_link_map *l; 522 int rv = 0; 523 524 *pciirq = 0; 525 526 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 527 l = SIMPLEQ_NEXT(l, list)) { 528 if (l->fixup_stage == 0) { 529 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 530 /* Appropriate interrupt was not found. */ 531 #ifdef DIAGNOSTIC 532 printf("pciintr_link_route: " 533 "PIRQ 0x%02x: no IRQ, try " 534 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n", 535 l->clink, 536 /* suggest irq 9/10/11, if possible */ 537 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 538 : l->bitmap); 539 #endif 540 } else { 541 /* BIOS setting has no problem */ 542 #ifdef PCIINTR_DEBUG 543 printf("pciintr_link_route: " 544 "route of PIRQ 0x%02x -> " 545 "IRQ %d preserved BIOS setting\n", 546 l->clink, l->irq); 547 #endif 548 *pciirq |= (1 << l->irq); 549 } 550 continue; /* nothing to do. */ 551 } 552 553 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 554 l->clink, l->irq) != 0 || 555 pciintr_icu_set_trigger(pciintr_icu_tag, 556 pciintr_icu_handle, 557 l->irq, IST_LEVEL) != 0) { 558 printf("pciintr_link_route: route of PIRQ 0x%02x -> " 559 "IRQ %d failed\n", l->clink, l->irq); 560 rv = 1; 561 } else { 562 /* 563 * Succssfully routed interrupt. Mark this as 564 * a PCI interrupt. 565 */ 566 *pciirq |= (1 << l->irq); 567 } 568 } 569 570 return (rv); 571 } 572 573 int 574 pciintr_irq_release(pciirq) 575 u_int16_t *pciirq; 576 { 577 int i, bit; 578 579 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 580 if ((*pciirq & bit) == 0) 581 (void) pciintr_icu_set_trigger(pciintr_icu_tag, 582 pciintr_icu_handle, i, IST_EDGE); 583 } 584 585 return (0); 586 } 587 588 int 589 pciintr_header_fixup(pc) 590 pci_chipset_tag_t pc; 591 { 592 PCIBIOS_PRINTV(("------------------------------------------\n")); 593 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n")); 594 PCIBIOS_PRINTV(("------------------------------------------\n")); 595 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL); 596 PCIBIOS_PRINTV(("------------------------------------------\n")); 597 598 return (0); 599 } 600 601 void 602 pciintr_do_header_fixup(pc, tag, context) 603 pci_chipset_tag_t pc; 604 pcitag_t tag; 605 void *context; 606 { 607 struct pcibios_intr_routing *pir; 608 struct pciintr_link_map *l; 609 int pin, irq, link; 610 int bus, device, function; 611 pcireg_t intr, id; 612 613 pci_decompose_tag(pc, tag, &bus, &device, &function); 614 id = pci_conf_read(pc, tag, PCI_ID_REG); 615 616 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 617 pin = PCI_INTERRUPT_PIN(intr); 618 irq = PCI_INTERRUPT_LINE(intr); 619 620 #if 0 621 if (pin == 0) { 622 /* 623 * No interrupt used. 624 */ 625 return; 626 } 627 #endif 628 629 pir = pciintr_pir_lookup(bus, device); 630 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) { 631 /* 632 * Interrupt not connected; no 633 * need to change. 634 */ 635 return; 636 } 637 638 l = pciintr_link_lookup(link); 639 if (l == NULL) { 640 #ifdef PCIINTR_DEBUG 641 /* 642 * No link map entry. 643 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 644 * was failed. 645 */ 646 printf("pciintr_header_fixup: no entry for link 0x%02x " 647 "(%d:%d:%d:%c)\n", link, bus, device, function, 648 '@' + pin); 649 #endif 650 return; 651 } 652 653 #ifdef PCIBIOSVERBOSE 654 if (pcibiosverbose) { 655 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x", 656 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), 657 '@' + pin, l->clink); 658 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 659 printf(" -"); 660 else 661 printf(" %3d", l->irq); 662 printf(" %d ", l->fixup_stage); 663 } 664 #endif 665 666 /* 667 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 668 * with them. 669 */ 670 if (irq == 14 || irq == 15) { 671 PCIBIOS_PRINTV((" WARNING: ignored\n")); 672 return; 673 } 674 675 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 676 /* Appropriate interrupt was not found. */ 677 if (pciintr_icu_tag == NULL && 678 irq != 0 && irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 679 /* 680 * Do not print warning, 681 * if no compatible PCI ICU found, 682 * but the irq is already assigned by BIOS. 683 */ 684 PCIBIOS_PRINTV(("\n")); 685 } else { 686 PCIBIOS_PRINTV((" WARNING: missing IRQ\n")); 687 } 688 return; 689 } 690 691 if (l->irq == irq) { 692 /* don't have to reconfigure */ 693 PCIBIOS_PRINTV((" already assigned\n")); 694 return; 695 } 696 697 if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 698 PCIBIOS_PRINTV((" fixed up\n")); 699 } else { 700 /* routed by BIOS, but inconsistent */ 701 #ifdef PCIBIOS_INTR_FIXUP_FORCE 702 /* believe PCI IRQ Routing table */ 703 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq)); 704 #else 705 /* believe PCI Interrupt Configuration Register (default) */ 706 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq)); 707 return; 708 #endif 709 } 710 711 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 712 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT); 713 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 714 } 715 716 int 717 pci_intr_fixup(pc, iot, pciirq) 718 pci_chipset_tag_t pc; 719 bus_space_tag_t iot; 720 u_int16_t *pciirq; 721 { 722 const struct pciintr_icu_table *piit = NULL; 723 pcitag_t icutag; 724 pcireg_t icuid; 725 726 /* 727 * Attempt to initialize our PCI interrupt router. If 728 * the PIR Table is present in ROM, use the location 729 * specified by the PIR Table, and use the compat ID, 730 * if present. Otherwise, we have to look for the router 731 * ourselves (the PCI-ISA bridge). 732 * 733 * A number of buggy BIOS implementations leave the router 734 * entry as 000:00:0, which is typically not the correct 735 * device/function. If the router device address is set to 736 * this value, and the compatible router entry is undefined 737 * (zero is the correct value to indicate undefined), then we 738 * work on the basis it is most likely an error, and search 739 * the entire device-space of bus 0 (but obviously starting 740 * with 000:00:0, in case that really is the right one). 741 */ 742 if (pcibios_pir_header.signature != 0 && 743 (pcibios_pir_header.router_bus != 0 || 744 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 || 745 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 || 746 pcibios_pir_header.compat_router != 0)) { 747 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus, 748 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 749 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 750 icuid = pcibios_pir_header.compat_router; 751 if (icuid == 0 || 752 (piit = pciintr_icu_lookup(icuid)) == NULL) { 753 /* 754 * No compat ID, or don't know the compat ID? Read 755 * it from the configuration header. 756 */ 757 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 758 } 759 if (piit == NULL) 760 piit = pciintr_icu_lookup(icuid); 761 } else { 762 int device, maxdevs = pci_bus_maxdevs(pc, 0); 763 764 /* 765 * Search configuration space for a known interrupt 766 * router. 767 */ 768 for (device = 0; device < maxdevs; device++) { 769 const struct pci_quirkdata *qd; 770 int function, nfuncs; 771 pcireg_t bhlcr; 772 773 icutag = pci_make_tag(pc, 0, device, 0); 774 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 775 776 /* Invalid vendor ID value? */ 777 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 778 continue; 779 /* XXX Not invalid, but we've done this ~forever. */ 780 if (PCI_VENDOR(icuid) == 0) 781 continue; 782 783 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 784 PCI_PRODUCT(icuid)); 785 786 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 787 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 788 (qd != NULL && 789 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 790 nfuncs = 8; 791 else 792 nfuncs = 1; 793 794 for (function = 0; function < nfuncs; function++) { 795 icutag = pci_make_tag(pc, 0, device, function); 796 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 797 798 /* Invalid vendor ID value? */ 799 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 800 continue; 801 /* Not invalid, but we've done this ~forever */ 802 if (PCI_VENDOR(icuid) == 0) 803 continue; 804 805 piit = pciintr_icu_lookup(icuid); 806 if (piit != NULL) 807 goto found; 808 } 809 } 810 811 /* 812 * Invalidate the ICU ID. If we failed to find the 813 * interrupt router (piit == NULL) we don't want to 814 * display a spurious device address below containing 815 * the product information of the last device we 816 * looked at. 817 */ 818 icuid = 0; 819 found:; 820 } 821 822 if (piit == NULL) { 823 printf("pci_intr_fixup: no compatible PCI ICU found"); 824 if (pcibios_pir_header.signature != 0 && icuid != 0) 825 printf(": ICU vendor 0x%04x product 0x%04x", 826 PCI_VENDOR(icuid), PCI_PRODUCT(icuid)); 827 printf("\n"); 828 #ifdef PCIBIOS_INTR_GUESS 829 if (pciintr_link_init()) 830 return (-1); /* non-fatal */ 831 if (pciintr_guess_irq()) 832 return (-1); /* non-fatal */ 833 if (pciintr_header_fixup(pc)) 834 return (1); /* fatal */ 835 return (0); /* success! */ 836 #else 837 return (-1); /* non-fatal */ 838 #endif 839 } 840 841 /* 842 * Initialize the PCI ICU. 843 */ 844 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 845 &pciintr_icu_handle) != 0) 846 return (-1); /* non-fatal */ 847 848 /* 849 * Initialize the PCI interrupt link map. 850 */ 851 if (pciintr_link_init()) 852 return (-1); /* non-fatal */ 853 854 /* 855 * Fix up the link->IRQ mappings. 856 */ 857 if (pciintr_link_fixup() != 0) 858 return (-1); /* non-fatal */ 859 860 /* 861 * Now actually program the PCI ICU with the new 862 * routing information. 863 */ 864 if (pciintr_link_route(pciirq) != 0) 865 return (1); /* fatal */ 866 867 /* 868 * Now that we've routed all of the PIRQs, rewrite the PCI 869 * configuration headers to reflect the new mapping. 870 */ 871 if (pciintr_header_fixup(pc) != 0) 872 return (1); /* fatal */ 873 874 /* 875 * Free any unused PCI IRQs for ISA devices. 876 */ 877 if (pciintr_irq_release(pciirq) != 0) 878 return (-1); /* non-fatal */ 879 880 /* 881 * All done! 882 */ 883 return (0); /* success! */ 884 } 885