1 /* $NetBSD: pci_intr_fixup.c,v 1.22 2002/11/22 15:23:52 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * PCI Interrupt Router support. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.22 2002/11/22 15:23:52 fvdl Exp $"); 71 72 #include "opt_pcibios.h" 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/malloc.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <i386/pci/pci_intr_fixup.h> 89 #include <i386/pci/pcibios.h> 90 91 struct pciintr_link_map { 92 int link; 93 int clink; 94 int irq; 95 u_int16_t bitmap; 96 int fixup_stage; 97 SIMPLEQ_ENTRY(pciintr_link_map) list; 98 }; 99 100 pciintr_icu_tag_t pciintr_icu_tag; 101 pciintr_icu_handle_t pciintr_icu_handle; 102 103 #ifdef PCIBIOS_IRQS_HINT 104 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 105 #endif 106 107 struct pciintr_link_map *pciintr_link_lookup __P((int)); 108 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *, 109 int)); 110 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int)); 111 static int pciintr_bitmap_count_irq __P((int, int *)); 112 static int pciintr_bitmap_find_lowest_irq __P((int, int *)); 113 int pciintr_link_init __P((void)); 114 #ifdef PCIBIOS_INTR_GUESS 115 int pciintr_guess_irq __P((void)); 116 #endif 117 int pciintr_link_fixup __P((void)); 118 int pciintr_link_route __P((u_int16_t *)); 119 int pciintr_irq_release __P((u_int16_t *)); 120 int pciintr_header_fixup __P((pci_chipset_tag_t)); 121 void pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*)); 122 123 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 124 125 const struct pciintr_icu_table { 126 pci_vendor_id_t piit_vendor; 127 pci_product_id_t piit_product; 128 int (*piit_init) __P((pci_chipset_tag_t, 129 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 130 pciintr_icu_handle_t *)); 131 } pciintr_icu_table[] = { 132 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 133 piix_init }, 134 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 135 piix_init }, 136 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 137 piix_init }, 138 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 139 piix_init }, 140 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 141 piix_init }, 142 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 143 piix_init }, 144 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC, 145 piix_init }, 146 147 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 148 opti82c558_init }, 149 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 150 opti82c700_init }, 151 152 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 153 via82c586_init }, 154 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 155 via82c586_init }, 156 157 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 158 sis85c503_init }, 159 160 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 161 amd756_init }, 162 163 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 164 ali1543_init }, 165 166 { 0, 0, 167 NULL }, 168 }; 169 170 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t)); 171 172 const struct pciintr_icu_table * 173 pciintr_icu_lookup(id) 174 pcireg_t id; 175 { 176 const struct pciintr_icu_table *piit; 177 178 for (piit = pciintr_icu_table; 179 piit->piit_init != NULL; 180 piit++) { 181 if (PCI_VENDOR(id) == piit->piit_vendor && 182 PCI_PRODUCT(id) == piit->piit_product) 183 return (piit); 184 } 185 186 return (NULL); 187 } 188 189 struct pciintr_link_map * 190 pciintr_link_lookup(link) 191 int link; 192 { 193 struct pciintr_link_map *l; 194 195 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 196 if (l->link == link) 197 return (l); 198 } 199 200 return (NULL); 201 } 202 203 struct pciintr_link_map * 204 pciintr_link_alloc(pir, pin) 205 struct pcibios_intr_routing *pir; 206 int pin; 207 { 208 int link = pir->linkmap[pin].link, clink, irq; 209 struct pciintr_link_map *l, *lstart; 210 211 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 212 /* 213 * Get the canonical link value for this entry. 214 */ 215 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 216 link, &clink) != 0) { 217 /* 218 * ICU doesn't understand the link value. 219 * Just ignore this PIR entry. 220 */ 221 #ifdef DIAGNOSTIC 222 printf("pciintr_link_alloc: bus %d device %d: " 223 "link 0x%02x invalid\n", 224 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link); 225 #endif 226 return (NULL); 227 } 228 229 /* 230 * Check the link value by asking the ICU for the 231 * canonical link value. 232 * Also, determine if this PIRQ is mapped to an IRQ. 233 */ 234 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 235 clink, &irq) != 0) { 236 /* 237 * ICU doesn't understand the canonical link value. 238 * Just ignore this PIR entry. 239 */ 240 #ifdef DIAGNOSTIC 241 printf("pciintr_link_alloc: " 242 "bus %d device %d link 0x%02x: " 243 "PIRQ 0x%02x invalid\n", 244 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, 245 clink); 246 #endif 247 return (NULL); 248 } 249 } 250 251 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT); 252 if (l == NULL) 253 panic("pciintr_link_alloc"); 254 255 memset(l, 0, sizeof(*l)); 256 257 l->link = link; 258 l->bitmap = pir->linkmap[pin].bitmap; 259 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 260 l->clink = clink; 261 l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */ 262 } else { 263 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */ 264 l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 265 } 266 267 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 268 if (lstart == NULL || lstart->link < l->link) 269 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 270 else 271 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 272 273 return (l); 274 } 275 276 struct pcibios_intr_routing * 277 pciintr_pir_lookup(bus, device) 278 int bus, device; 279 { 280 struct pcibios_intr_routing *pir; 281 int entry; 282 283 if (pcibios_pir_table == NULL) 284 return (NULL); 285 286 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 287 pir = &pcibios_pir_table[entry]; 288 if (pir->bus == bus && 289 PIR_DEVFUNC_DEVICE(pir->device) == device) 290 return (pir); 291 } 292 293 return (NULL); 294 } 295 296 static int 297 pciintr_bitmap_count_irq(irq_bitmap, irqp) 298 int irq_bitmap, *irqp; 299 { 300 int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 301 302 if (irq_bitmap != 0) { 303 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 304 if (irq_bitmap & bit) { 305 irq = i; 306 count++; 307 } 308 } 309 } 310 *irqp = irq; 311 return (count); 312 } 313 314 static int 315 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp) 316 int irq_bitmap, *irqp; 317 { 318 int i, bit; 319 320 if (irq_bitmap != 0) { 321 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 322 if (irq_bitmap & bit) { 323 *irqp = i; 324 return (1); /* found */ 325 } 326 } 327 } 328 return (0); /* not found */ 329 } 330 331 int 332 pciintr_link_init() 333 { 334 int entry, pin, link; 335 struct pcibios_intr_routing *pir; 336 struct pciintr_link_map *l; 337 338 if (pcibios_pir_table == NULL) { 339 /* No PIR table; can't do anything. */ 340 printf("pciintr_link_init: no PIR table\n"); 341 return (1); 342 } 343 344 SIMPLEQ_INIT(&pciintr_link_map_list); 345 346 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 347 pir = &pcibios_pir_table[entry]; 348 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 349 link = pir->linkmap[pin].link; 350 if (link == 0) { 351 /* No connection for this pin. */ 352 continue; 353 } 354 /* 355 * Multiple devices may be wired to the same 356 * interrupt; check to see if we've seen this 357 * one already. If not, allocate a new link 358 * map entry and stuff it in the map. 359 */ 360 l = pciintr_link_lookup(link); 361 if (l == NULL) { 362 (void) pciintr_link_alloc(pir, pin); 363 } else if (pir->linkmap[pin].bitmap != l->bitmap) { 364 /* 365 * violates PCI IRQ Routing Table Specification 366 */ 367 #ifdef DIAGNOSTIC 368 printf("pciintr_link_init: " 369 "bus %d device %d link 0x%02x: " 370 "bad irq bitmap 0x%04x, " 371 "should be 0x%04x\n", 372 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), 373 link, pir->linkmap[pin].bitmap, l->bitmap); 374 #endif 375 /* safer value. */ 376 l->bitmap &= pir->linkmap[pin].bitmap; 377 /* XXX - or, should ignore this entry? */ 378 } 379 } 380 } 381 382 return (0); 383 } 384 385 #ifdef PCIBIOS_INTR_GUESS 386 /* 387 * No compatible PCI ICU found. 388 * Hopes the BIOS already setup the ICU. 389 */ 390 int 391 pciintr_guess_irq() 392 { 393 struct pciintr_link_map *l; 394 int irq, guessed = 0; 395 396 /* 397 * Stage 1: If only one IRQ is available for the link, use it. 398 */ 399 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 400 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 401 continue; 402 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 403 l->irq = irq; 404 l->fixup_stage = 1; 405 #ifdef PCIINTR_DEBUG 406 printf("pciintr_guess_irq (stage 1): " 407 "guessing PIRQ 0x%02x to be IRQ %d\n", 408 l->clink, l->irq); 409 #endif 410 guessed = 1; 411 } 412 } 413 414 return (guessed ? 0 : -1); 415 } 416 #endif /* PCIBIOS_INTR_GUESS */ 417 418 int 419 pciintr_link_fixup() 420 { 421 struct pciintr_link_map *l; 422 int irq; 423 u_int16_t pciirq = 0; 424 425 /* 426 * First stage: Attempt to connect PIRQs which aren't 427 * yet connected. 428 */ 429 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 430 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 431 /* 432 * Interrupt is already connected. Don't do 433 * anything to it. 434 * In this case, l->fixup_stage == 0. 435 */ 436 pciirq |= 1 << l->irq; 437 #ifdef PCIINTR_DEBUG 438 printf("pciintr_link_fixup: PIRQ 0x%02x already " 439 "connected to IRQ %d\n", l->clink, l->irq); 440 #endif 441 continue; 442 } 443 /* 444 * Interrupt isn't connected. Attempt to assign it to an IRQ. 445 */ 446 #ifdef PCIINTR_DEBUG 447 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 448 l->clink); 449 #endif 450 /* 451 * Just do the easy case now; we'll defer the harder ones 452 * to Stage 2. 453 */ 454 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 455 l->irq = irq; 456 l->fixup_stage = 1; 457 pciirq |= 1 << irq; 458 #ifdef PCIINTR_DEBUG 459 printf(", assigning IRQ %d", l->irq); 460 #endif 461 } 462 #ifdef PCIINTR_DEBUG 463 printf("\n"); 464 #endif 465 } 466 467 /* 468 * Stage 2: Attempt to connect PIRQs which we didn't 469 * connect in Stage 1. 470 */ 471 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 472 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 473 continue; 474 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq, 475 &l->irq)) { 476 /* 477 * This IRQ is a valid PCI IRQ already 478 * connected to another PIRQ, and also an 479 * IRQ our PIRQ can use; connect it up! 480 */ 481 l->fixup_stage = 2; 482 #ifdef PCIINTR_DEBUG 483 printf("pciintr_link_fixup (stage 2): " 484 "assigning IRQ %d to PIRQ 0x%02x\n", 485 l->irq, l->clink); 486 #endif 487 } 488 } 489 490 #ifdef PCIBIOS_IRQS_HINT 491 /* 492 * Stage 3: The worst case. I need configuration hint that 493 * user supplied a mask for the PCI irqs 494 */ 495 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 496 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 497 continue; 498 if (pciintr_bitmap_find_lowest_irq( 499 l->bitmap & pcibios_irqs_hint, &l->irq)) { 500 l->fixup_stage = 3; 501 #ifdef PCIINTR_DEBUG 502 printf("pciintr_link_fixup (stage 3): " 503 "assigning IRQ %d to PIRQ 0x%02x\n", 504 l->irq, l->clink); 505 #endif 506 } 507 } 508 #endif /* PCIBIOS_IRQS_HINT */ 509 510 return (0); 511 } 512 513 int 514 pciintr_link_route(pciirq) 515 u_int16_t *pciirq; 516 { 517 struct pciintr_link_map *l; 518 int rv = 0; 519 520 *pciirq = 0; 521 522 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 523 if (l->fixup_stage == 0) { 524 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 525 /* Appropriate interrupt was not found. */ 526 #ifdef DIAGNOSTIC 527 printf("pciintr_link_route: " 528 "PIRQ 0x%02x: no IRQ, try " 529 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n", 530 l->clink, 531 /* suggest irq 9/10/11, if possible */ 532 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 533 : l->bitmap); 534 #endif 535 } else { 536 /* BIOS setting has no problem */ 537 #ifdef PCIINTR_DEBUG 538 printf("pciintr_link_route: " 539 "route of PIRQ 0x%02x -> " 540 "IRQ %d preserved BIOS setting\n", 541 l->clink, l->irq); 542 #endif 543 *pciirq |= (1 << l->irq); 544 } 545 continue; /* nothing to do. */ 546 } 547 548 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 549 l->clink, l->irq) != 0 || 550 pciintr_icu_set_trigger(pciintr_icu_tag, 551 pciintr_icu_handle, 552 l->irq, IST_LEVEL) != 0) { 553 printf("pciintr_link_route: route of PIRQ 0x%02x -> " 554 "IRQ %d failed\n", l->clink, l->irq); 555 rv = 1; 556 } else { 557 /* 558 * Succssfully routed interrupt. Mark this as 559 * a PCI interrupt. 560 */ 561 *pciirq |= (1 << l->irq); 562 } 563 } 564 565 return (rv); 566 } 567 568 int 569 pciintr_irq_release(pciirq) 570 u_int16_t *pciirq; 571 { 572 int i, bit; 573 574 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 575 if ((*pciirq & bit) == 0) 576 (void) pciintr_icu_set_trigger(pciintr_icu_tag, 577 pciintr_icu_handle, i, IST_EDGE); 578 } 579 580 return (0); 581 } 582 583 int 584 pciintr_header_fixup(pc) 585 pci_chipset_tag_t pc; 586 { 587 PCIBIOS_PRINTV(("------------------------------------------\n")); 588 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n")); 589 PCIBIOS_PRINTV(("------------------------------------------\n")); 590 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL); 591 PCIBIOS_PRINTV(("------------------------------------------\n")); 592 593 return (0); 594 } 595 596 void 597 pciintr_do_header_fixup(pc, tag, context) 598 pci_chipset_tag_t pc; 599 pcitag_t tag; 600 void *context; 601 { 602 struct pcibios_intr_routing *pir; 603 struct pciintr_link_map *l; 604 int pin, irq, link; 605 int bus, device, function; 606 pcireg_t intr, id; 607 608 pci_decompose_tag(pc, tag, &bus, &device, &function); 609 id = pci_conf_read(pc, tag, PCI_ID_REG); 610 611 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 612 pin = PCI_INTERRUPT_PIN(intr); 613 irq = PCI_INTERRUPT_LINE(intr); 614 615 #if 0 616 if (pin == 0) { 617 /* 618 * No interrupt used. 619 */ 620 return; 621 } 622 #endif 623 624 pir = pciintr_pir_lookup(bus, device); 625 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) { 626 /* 627 * Interrupt not connected; no 628 * need to change. 629 */ 630 return; 631 } 632 633 l = pciintr_link_lookup(link); 634 if (l == NULL) { 635 #ifdef PCIINTR_DEBUG 636 /* 637 * No link map entry. 638 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 639 * was failed. 640 */ 641 printf("pciintr_header_fixup: no entry for link 0x%02x " 642 "(%d:%d:%d:%c)\n", link, bus, device, function, 643 '@' + pin); 644 #endif 645 return; 646 } 647 648 #ifdef PCIBIOSVERBOSE 649 if (pcibiosverbose) { 650 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x", 651 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), 652 '@' + pin, l->clink); 653 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 654 printf(" -"); 655 else 656 printf(" %3d", l->irq); 657 printf(" %d ", l->fixup_stage); 658 } 659 #endif 660 661 /* 662 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 663 * with them. 664 */ 665 if (irq == 14 || irq == 15) { 666 PCIBIOS_PRINTV((" WARNING: ignored\n")); 667 return; 668 } 669 670 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 671 /* Appropriate interrupt was not found. */ 672 if (pciintr_icu_tag == NULL && 673 irq != 0 && irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 674 /* 675 * Do not print warning, 676 * if no compatible PCI ICU found, 677 * but the irq is already assigned by BIOS. 678 */ 679 PCIBIOS_PRINTV(("\n")); 680 } else { 681 PCIBIOS_PRINTV((" WARNING: missing IRQ\n")); 682 } 683 return; 684 } 685 686 if (l->irq == irq) { 687 /* don't have to reconfigure */ 688 PCIBIOS_PRINTV((" already assigned\n")); 689 return; 690 } 691 692 if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 693 PCIBIOS_PRINTV((" fixed up\n")); 694 } else { 695 /* routed by BIOS, but inconsistent */ 696 #ifdef PCIBIOS_INTR_FIXUP_FORCE 697 /* believe PCI IRQ Routing table */ 698 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq)); 699 #else 700 /* believe PCI Interrupt Configuration Register (default) */ 701 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq)); 702 return; 703 #endif 704 } 705 706 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 707 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT); 708 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 709 } 710 711 int 712 pci_intr_fixup(pc, iot, pciirq) 713 pci_chipset_tag_t pc; 714 bus_space_tag_t iot; 715 u_int16_t *pciirq; 716 { 717 const struct pciintr_icu_table *piit = NULL; 718 pcitag_t icutag; 719 pcireg_t icuid; 720 721 /* 722 * Attempt to initialize our PCI interrupt router. If 723 * the PIR Table is present in ROM, use the location 724 * specified by the PIR Table, and use the compat ID, 725 * if present. Otherwise, we have to look for the router 726 * ourselves (the PCI-ISA bridge). 727 * 728 * A number of buggy BIOS implementations leave the router 729 * entry as 000:00:0, which is typically not the correct 730 * device/function. If the router device address is set to 731 * this value, and the compatible router entry is undefined 732 * (zero is the correct value to indicate undefined), then we 733 * work on the basis it is most likely an error, and search 734 * the entire device-space of bus 0 (but obviously starting 735 * with 000:00:0, in case that really is the right one). 736 */ 737 if (pcibios_pir_header.signature != 0 && 738 (pcibios_pir_header.router_bus != 0 || 739 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 || 740 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 || 741 pcibios_pir_header.compat_router != 0)) { 742 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus, 743 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 744 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 745 icuid = pcibios_pir_header.compat_router; 746 if (icuid == 0 || 747 (piit = pciintr_icu_lookup(icuid)) == NULL) { 748 /* 749 * No compat ID, or don't know the compat ID? Read 750 * it from the configuration header. 751 */ 752 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 753 } 754 if (piit == NULL) 755 piit = pciintr_icu_lookup(icuid); 756 } else { 757 int device, maxdevs = pci_bus_maxdevs(pc, 0); 758 759 /* 760 * Search configuration space for a known interrupt 761 * router. 762 */ 763 for (device = 0; device < maxdevs; device++) { 764 const struct pci_quirkdata *qd; 765 int function, nfuncs; 766 pcireg_t bhlcr; 767 768 icutag = pci_make_tag(pc, 0, device, 0); 769 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 770 771 /* Invalid vendor ID value? */ 772 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 773 continue; 774 /* XXX Not invalid, but we've done this ~forever. */ 775 if (PCI_VENDOR(icuid) == 0) 776 continue; 777 778 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 779 PCI_PRODUCT(icuid)); 780 781 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 782 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 783 (qd != NULL && 784 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 785 nfuncs = 8; 786 else 787 nfuncs = 1; 788 789 for (function = 0; function < nfuncs; function++) { 790 icutag = pci_make_tag(pc, 0, device, function); 791 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 792 793 /* Invalid vendor ID value? */ 794 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 795 continue; 796 /* Not invalid, but we've done this ~forever */ 797 if (PCI_VENDOR(icuid) == 0) 798 continue; 799 800 piit = pciintr_icu_lookup(icuid); 801 if (piit != NULL) 802 goto found; 803 } 804 } 805 806 /* 807 * Invalidate the ICU ID. If we failed to find the 808 * interrupt router (piit == NULL) we don't want to 809 * display a spurious device address below containing 810 * the product information of the last device we 811 * looked at. 812 */ 813 icuid = 0; 814 found:; 815 } 816 817 if (piit == NULL) { 818 printf("pci_intr_fixup: no compatible PCI ICU found"); 819 if (pcibios_pir_header.signature != 0 && icuid != 0) 820 printf(": ICU vendor 0x%04x product 0x%04x", 821 PCI_VENDOR(icuid), PCI_PRODUCT(icuid)); 822 printf("\n"); 823 #ifdef PCIBIOS_INTR_GUESS 824 if (pciintr_link_init()) 825 return (-1); /* non-fatal */ 826 if (pciintr_guess_irq()) 827 return (-1); /* non-fatal */ 828 if (pciintr_header_fixup(pc)) 829 return (1); /* fatal */ 830 return (0); /* success! */ 831 #else 832 return (-1); /* non-fatal */ 833 #endif 834 } 835 836 /* 837 * Initialize the PCI ICU. 838 */ 839 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 840 &pciintr_icu_handle) != 0) 841 return (-1); /* non-fatal */ 842 843 /* 844 * Initialize the PCI interrupt link map. 845 */ 846 if (pciintr_link_init()) 847 return (-1); /* non-fatal */ 848 849 /* 850 * Fix up the link->IRQ mappings. 851 */ 852 if (pciintr_link_fixup() != 0) 853 return (-1); /* non-fatal */ 854 855 /* 856 * Now actually program the PCI ICU with the new 857 * routing information. 858 */ 859 if (pciintr_link_route(pciirq) != 0) 860 return (1); /* fatal */ 861 862 /* 863 * Now that we've routed all of the PIRQs, rewrite the PCI 864 * configuration headers to reflect the new mapping. 865 */ 866 if (pciintr_header_fixup(pc) != 0) 867 return (1); /* fatal */ 868 869 /* 870 * Free any unused PCI IRQs for ISA devices. 871 */ 872 if (pciintr_irq_release(pciirq) != 0) 873 return (-1); /* non-fatal */ 874 875 /* 876 * All done! 877 */ 878 return (0); /* success! */ 879 } 880