1 /* $NetBSD: pcibios.h,v 1.5 2002/01/22 15:07:27 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 /* 29 * Data structure definitions for the PCI BIOS interface. 30 */ 31 32 /* 33 * PCI BIOS return codes. 34 */ 35 #define PCIBIOS_SUCCESS 0x00 36 #define PCIBIOS_SERVICE_NOT_PRESENT 0x80 37 #define PCIBIOS_FUNCTION_NOT_SUPPORTED 0x81 38 #define PCIBIOS_BAD_VENDOR_ID 0x83 39 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 40 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 41 #define PCIBIOS_SET_FAILED 0x88 42 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 43 44 /* 45 * PCI IRQ Routing Table definitions. 46 */ 47 48 /* 49 * Slot entry (per PCI 2.1) 50 */ 51 struct pcibios_linkmap { 52 u_int8_t link; 53 u_int16_t bitmap; 54 } __attribute__((__packed__)); 55 56 struct pcibios_intr_routing { 57 u_int8_t bus; 58 u_int8_t device; 59 struct pcibios_linkmap linkmap[4]; /* INT[A:D]# */ 60 u_int8_t slot; 61 u_int8_t reserved; 62 } __attribute__((__packed__)); 63 64 /* 65 * $PIR header. Reference: 66 * 67 * http://www.microsoft.com/HWDEV/busbios/PCIIRQ.htm 68 */ 69 struct pcibios_pir_header { 70 u_int32_t signature; /* $PIR */ 71 u_int16_t version; 72 u_int16_t tablesize; 73 u_int8_t router_bus; 74 u_int8_t router_devfunc; 75 u_int16_t exclusive_irq; 76 u_int32_t compat_router; /* PCI vendor/product */ 77 u_int32_t miniport; 78 u_int8_t reserved[11]; 79 u_int8_t checksum; 80 } __attribute__((__packed__)); 81 82 #define PIR_DEVFUNC_DEVICE(devfunc) (((devfunc) >> 3) & 0x1f) 83 #define PIR_DEVFUNC_FUNCTION(devfunc) ((devfunc) & 7) 84 85 void pcibios_init __P((void)); 86 87 extern struct pcibios_pir_header pcibios_pir_header; 88 extern struct pcibios_intr_routing *pcibios_pir_table; 89 extern int pcibios_pir_table_nentries; 90 extern int pcibios_max_bus; 91 92 void pci_device_foreach __P((pci_chipset_tag_t, int, 93 void (*) (pci_chipset_tag_t, pcitag_t, void*), 94 void *context)); 95 96 void pci_device_foreach_min __P((pci_chipset_tag_t, int, int, 97 void (*) (pci_chipset_tag_t, pcitag_t, void*), 98 void *context)); 99 100 void pci_bridge_foreach(pci_chipset_tag_t, int, int, 101 void (*) (pci_chipset_tag_t, pcitag_t, void *), void *); 102 103 #ifdef PCIBIOSVERBOSE 104 extern int pcibiosverbose; 105 106 #define PCIBIOS_PRINTV(arg) \ 107 do { \ 108 if (pcibiosverbose) \ 109 printf arg; \ 110 } while (0) 111 #define PCIBIOS_PRINTVN(n, arg) \ 112 do { \ 113 if (pcibiosverbose > (n)) \ 114 printf arg; \ 115 } while (0) 116 #else 117 #define PCIBIOS_PRINTV(arg) 118 #define PCIBIOS_PRINTVN(n, arg) 119 #endif 120