xref: /netbsd/sys/arch/i386/pci/sis85c503reg.h (revision bf9ec67e)
1 /*	$NetBSD: sis85c503reg.h,v 1.1 1999/11/17 01:21:21 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1999, by UCHIYAMA Yasushi
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. The name of the developer may NOT be used to endorse or promote products
13  *    derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * Register definitions for the SiS 85c503 PCI-ISA bridge interrupt controller.
30  */
31 
32 #define	SIS85C503_CFG_PIRQ_REGSTART	0x41	/* PCI configuration space */
33 #define	SIS85C503_CFG_PIRQ_REGEND	0x44
34 
35 #define	SIS85C503_LEGAL_LINK(link) ((link) >= SIS85C503_CFG_PIRQ_REGSTART && \
36 				    (link) <= SIS85C503_CFG_PIRQ_REGEND)
37 
38 #define	SIS85C503_CFG_PIRQ_REGOFS(regofs) (((regofs) >> 2) << 2)
39 #define	SIS85C503_CFG_PIRQ_SHIFT(regofs)				\
40 	(((regofs) - SIS85C503_CFG_PIRQ_REGOFS(regofs)) << 3)
41 
42 #define	SIS85C503_CFG_PIRQ_MASK		0xff
43 #define	SIS85C503_CFG_PIRQ_INTR_MASK	0x0f
44 
45 #define	SIS85C503_CFG_PIRQ_REG(reg, regofs)				\
46 	(((reg) >> SIS85C503_CFG_PIRQ_SHIFT(regofs)) & SIS85C503_CFG_PIRQ_MASK)
47 
48 #define	SIS85C503_CFG_PIRQ_ROUTE_DISABLE 0x80
49 
50 #define	SIS85C503_PIRQ_MASK		0xdef8
51 #define	SIS85C503_LEGAL_IRQ(irq)	((irq) >= 0 && (irq) <= 15 &&	\
52 				 ((1 << (irq)) & SIS85C503_PIRQ_MASK) != 0)
53