xref: /netbsd/sys/arch/iyonix/iyonix/iyonix_pci.c (revision 6550d01e)
1 /*	$NetBSD: iyonix_pci.c,v 1.5 2007/10/17 19:55:03 garbled Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Based on code written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Iyonix PCI interrupt support.
40  */
41 
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: iyonix_pci.c,v 1.5 2007/10/17 19:55:03 garbled Exp $");
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/device.h>
48 
49 #include <machine/autoconf.h>
50 #include <machine/bus.h>
51 
52 #include <iyonix/iyonix/iyonixreg.h>
53 #include <iyonix/iyonix/iyonixvar.h>
54 
55 #include <arm/xscale/i80321reg.h>
56 #include <arm/xscale/i80321var.h>
57 
58 #include <dev/pci/pcidevs.h>
59 #include <dev/pci/ppbreg.h>
60 
61 #include <sys/extent.h>
62 #include <dev/pci/pciconf.h>
63 
64 int	iyonix_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
65 const char *iyonix_pci_intr_string(void *, pci_intr_handle_t);
66 const struct evcnt *iyonix_pci_intr_evcnt(void *, pci_intr_handle_t);
67 void	*iyonix_pci_intr_establish(void *, pci_intr_handle_t,
68 	    int, int (*func)(void *), void *);
69 void	iyonix_pci_intr_disestablish(void *, void *);
70 void pci_conf_write_byte(pci_chipset_tag_t, pcitag_t, int, int);
71 int pci_conf_read_byte(pci_chipset_tag_t, pcitag_t, int);
72 
73 void
74 iyonix_pci_init(pci_chipset_tag_t pc, void *cookie)
75 {
76 
77 	pc->pc_intr_v = cookie;		/* the i80321 softc */
78 	pc->pc_intr_map = iyonix_pci_intr_map;
79 	pc->pc_intr_string = iyonix_pci_intr_string;
80 	pc->pc_intr_evcnt = iyonix_pci_intr_evcnt;
81 	pc->pc_intr_establish = iyonix_pci_intr_establish;
82 	pc->pc_intr_disestablish = iyonix_pci_intr_disestablish;
83 }
84 
85 int
86 iyonix_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
87 {
88 	struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
89 	int b, d, f;
90 	uint32_t busno;
91 
92 	busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
93 	busno = PCIXSR_BUSNO(busno);
94 	if (busno == 0xff)
95 		busno = 0;
96 
97 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
98 
99 	/* No mappings for devices not on our bus. */
100 	if (b != busno)
101 		goto no_mapping;
102 
103 	/*
104 	 *  XXX We currently deal only with the southbridge and with
105 	 *      regular PCI. IOC devices may need further attention.
106 	 */
107 
108 	/* Devices on the southbridge are all routed through xint 1 */
109 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI) {
110 		switch (PCI_PRODUCT(pa->pa_id)) {
111 			case PCI_PRODUCT_ALI_M1543: /* Southbridge */
112 			case PCI_PRODUCT_ALI_M5229: /* ATA */
113 			case PCI_PRODUCT_ALI_M5237: /* ohci */
114 			case PCI_PRODUCT_ALI_M5257: /* Modem */
115 			case PCI_PRODUCT_ALI_M5451: /* AC97 */
116 			case PCI_PRODUCT_ALI_M7101: /* PMC */
117 				*ihp = ICU_INT_XINT(1);
118 				return (0);
119 		}
120 	}
121 
122 	/* Route other interrupts with default swizzling rule */
123 	*ihp = ICU_INT_XINT((d + pa->pa_intrpin - 1) % 4);
124 	return 0;
125 
126  no_mapping:
127 	printf("iyonix_pci_intr_map: no mapping for %d/%d/%d\n",
128 	    pa->pa_bus, pa->pa_device, pa->pa_function);
129 	return (1);
130 }
131 
132 const char *
133 iyonix_pci_intr_string(void *v, pci_intr_handle_t ih)
134 {
135 
136 	return (i80321_irqnames[ih]);
137 }
138 
139 const struct evcnt *
140 iyonix_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
141 {
142 
143 	/* XXX For now. */
144 	return (NULL);
145 }
146 
147 void *
148 iyonix_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
149     int (*func)(void *), void *arg)
150 {
151 
152 	return (i80321_intr_establish(ih, ipl, func, arg));
153 }
154 
155 void
156 iyonix_pci_intr_disestablish(void *v, void *cookie)
157 {
158 
159 	i80321_intr_disestablish(cookie);
160 }
161 
162 void
163 pci_conf_write_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr, int value)
164 {
165 	int temp;
166 	temp = pci_conf_read(pc, tag, addr&~3);
167 	temp = temp & ~(0xff << ((addr%4) * 8));
168 	temp = temp | (value << ((addr%4) * 8));
169 	pci_conf_write(pc, tag, addr&~3, temp);
170 }
171 
172 int
173 pci_conf_read_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr)
174 {
175 	int temp;
176 	temp = pci_conf_read(pc, tag, addr&~3);
177 	temp = temp >> ((addr%4) * 8);
178 	temp = temp & 0xff;
179 	return temp;
180 }
181 
182 int
183 pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
184 {
185 
186 	/*
187 	 * We need to disable devices in the Southbridge, and as
188 	 * we have all the tags we need at this point, this is
189 	 * where we do it.
190 	 */
191 	if (PCI_VENDOR(id) == PCI_VENDOR_ALI &&
192 	    PCI_PRODUCT(id) == PCI_PRODUCT_ALI_M1543)
193 	{
194 		pcitag_t tag;
195 		int status;
196 		pci_chipset_tag_t pc = (pci_chipset_tag_t) v;
197 
198 		tag = pci_make_tag(pc, bus, dev, func);
199 
200 		/* Undocumented magic */
201 
202 		/* Disable USB */
203 		pci_conf_write_byte(pc, tag, 0x53, 0x40);
204 		pci_conf_write_byte(pc, tag, 0x52, 0x00);
205 
206 		status = pci_conf_read_byte(pc, tag, 0x7e);
207 		pci_conf_write_byte(pc, tag, 0x7e, status & ~0x80);
208 
209 		/* Disable modem */
210 		pci_conf_write_byte(pc, tag, 0x77, 1 << 6);
211 
212 		/* Disable SCI */
213 		pci_conf_write_byte(pc, tag, 0x78, 1 << 7);
214 	}
215 
216 	return (PCI_CONF_DEFAULT);
217 }
218