1 /* $NetBSD: pmap_bootstrap.c,v 1.3 2000/12/12 04:06:08 nisimura Exp $ */ 2 3 /* 4 * Copyright (c) 1991, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)pmap_bootstrap.c 8.1 (Berkeley) 6/10/93 40 */ 41 42 #include <sys/param.h> 43 #include <sys/proc.h> 44 45 #include <machine/frame.h> 46 #include <machine/cpu.h> 47 #include <machine/vmparam.h> 48 #include <machine/pte.h> 49 50 #include <uvm/uvm_extern.h> 51 52 #define RELOC(v, t) *((t*)((u_int)&(v) + firstpa)) 53 54 extern char *etext; 55 extern int Sysptsize; 56 extern char *proc0paddr; 57 extern st_entry_t *Sysseg; 58 extern pt_entry_t *Sysptmap, *Sysmap; 59 60 extern int maxmem, physmem; 61 extern paddr_t avail_start, avail_end; 62 extern vaddr_t virtual_avail, virtual_end; 63 extern vsize_t mem_size; 64 extern int protection_codes[]; 65 66 void pmap_bootstrap __P((paddr_t, paddr_t)); 67 68 /* 69 * Special purpose kernel virtual addresses, used for mapping 70 * physical pages for a variety of temporary or permanent purposes: 71 * 72 * CADDR1, CADDR2: pmap zero/copy operations 73 * vmmap: /dev/mem, crash dumps, parity error checking 74 * msgbufaddr: kernel message buffer 75 */ 76 caddr_t CADDR1, CADDR2, vmmap; 77 extern caddr_t msgbufaddr; 78 79 /* 80 * Bootstrap the VM system. 81 * 82 * Called with MMU off so we must relocate all global references by `firstpa' 83 * (don't call any functions here!) `nextpa' is the first available physical 84 * memory address. Returns an updated first PA reflecting the memory we 85 * have allocated. MMU is still off when we return. 86 * 87 * XXX assumes sizeof(u_int) == sizeof(pt_entry_t) 88 * XXX a PIC compiler would make this much easier. 89 */ 90 void 91 pmap_bootstrap(nextpa, firstpa) 92 paddr_t nextpa; 93 paddr_t firstpa; 94 { 95 paddr_t kstpa, kptpa, eiiopa, iiopa, kptmpa, p0upa; 96 u_int nptpages, kstsize; 97 st_entry_t protoste, *ste; 98 pt_entry_t protopte, *pte, *epte; 99 u_int iiomapsize; 100 101 /* 102 * Calculate important physical addresses: 103 * 104 * kstpa kernel segment table 1 page (!040) 105 * N pages (040) 106 * 107 * kptpa statically allocated 108 * kernel PT pages Sysptsize+ pages 109 * 110 * iiopa internal IO space 111 * PT pages iiomapsize pages 112 * 113 * eiiopa page following 114 * internal IO space 115 * 116 * [ Sysptsize is the number of pages of PT, and iiomapsize 117 * is the number of PTEs, hence we need to round 118 * the total to a page boundary with IO maps at the end. ] 119 * 120 * kptmpa kernel PT map 1 page 121 * 122 * p0upa proc 0 u-area UPAGES pages 123 * 124 * The KVA corresponding to any of these PAs is: 125 * (PA - firstpa + KERNBASE). 126 */ 127 iiomapsize = m68k_btop(RELOC(intiotop_phys, u_int) - 128 RELOC(intiobase_phys, u_int)); 129 130 if (RELOC(mmutype, int) == MMU_68040) 131 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 132 else 133 kstsize = 1; 134 kstpa = nextpa; 135 nextpa += kstsize * NBPG; 136 kptpa = nextpa; 137 nptpages = RELOC(Sysptsize, int) + 138 (iiomapsize + NPTEPG - 1) / NPTEPG; 139 nextpa += nptpages * NBPG; 140 eiiopa = nextpa; /* just a reference for later */ 141 iiopa = nextpa - iiomapsize * sizeof(pt_entry_t); 142 kptmpa = nextpa; 143 nextpa += NBPG; 144 p0upa = nextpa; 145 nextpa += USPACE; 146 147 /* 148 * Initialize segment table and kernel page table map. 149 * 150 * On 68030s and earlier MMUs the two are identical except for 151 * the valid bits so both are initialized with essentially the 152 * same values. On the 68040, which has a mandatory 3-level 153 * structure, the segment table holds the level 1 table and part 154 * (or all) of the level 2 table and hence is considerably 155 * different. Here the first level consists of 128 descriptors 156 * (512 bytes) each mapping 32mb of address space. Each of these 157 * points to blocks of 128 second level descriptors (512 bytes) 158 * each mapping 256kb. Note that there may be additional "segment 159 * table" pages depending on how large MAXKL2SIZE is. 160 * 161 * XXX cramming two levels of mapping into the single "segment" 162 * table on the 68040 is intended as a temporary hack to get things 163 * working. The 224mb of address space that this allows will most 164 * likely be insufficient in the future (at least for the kernel). 165 */ 166 #if defined(M68040) 167 if (RELOC(mmutype, int) == MMU_68040) { 168 int num; 169 170 /* 171 * First invalidate the entire "segment table" pages 172 * (levels 1 and 2 have the same "invalid" value). 173 */ 174 pte = (u_int *)kstpa; 175 epte = &pte[kstsize * NPTEPG]; 176 while (pte < epte) 177 *pte++ = SG_NV; 178 /* 179 * Initialize level 2 descriptors (which immediately 180 * follow the level 1 table). We need: 181 * NPTEPG / SG4_LEV3SIZE 182 * level 2 descriptors to map each of the nptpages+1 183 * pages of PTEs. Note that we set the "used" bit 184 * now to save the HW the expense of doing it. 185 */ 186 num = (nptpages + 1) * (NPTEPG / SG4_LEV3SIZE); 187 pte = &((u_int *)kstpa)[SG4_LEV1SIZE]; 188 epte = &pte[num]; 189 protoste = kptpa | SG_U | SG_RW | SG_V; 190 while (pte < epte) { 191 *pte++ = protoste; 192 protoste += (SG4_LEV3SIZE * sizeof(st_entry_t)); 193 } 194 /* 195 * Initialize level 1 descriptors. We need: 196 * roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE 197 * level 1 descriptors to map the `num' level 2's. 198 */ 199 pte = (u_int *)kstpa; 200 epte = &pte[roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE]; 201 protoste = (u_int)&pte[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V; 202 while (pte < epte) { 203 *pte++ = protoste; 204 protoste += (SG4_LEV2SIZE * sizeof(st_entry_t)); 205 } 206 /* 207 * Initialize the final level 1 descriptor to map the last 208 * block of level 2 descriptors. 209 */ 210 ste = &((u_int *)kstpa)[SG4_LEV1SIZE-1]; 211 pte = &((u_int *)kstpa)[kstsize*NPTEPG - SG4_LEV2SIZE]; 212 *ste = (u_int)pte | SG_U | SG_RW | SG_V; 213 /* 214 * Now initialize the final portion of that block of 215 * descriptors to map the "last PT page". 216 */ 217 pte = &((u_int *)kstpa)[kstsize*NPTEPG - NPTEPG/SG4_LEV3SIZE]; 218 epte = &pte[NPTEPG/SG4_LEV3SIZE]; 219 protoste = lkptpa | SG_U | SG_RW | SG_V; 220 while (pte < epte) { 221 *pte++ = protoste; 222 protoste += (SG4_LEV3SIZE * sizeof(st_entry_t)); 223 } 224 /* 225 * Initialize Sysptmap 226 */ 227 pte = (u_int *)kptmpa; 228 epte = &pte[nptpages+1]; 229 protopte = kptpa | PG_RW | PG_CI | PG_V; 230 while (pte < epte) { 231 *pte++ = protopte; 232 protopte += NBPG; 233 } 234 /* 235 * Invalidate all but the last remaining entry. 236 */ 237 epte = &((u_int *)kptmpa)[NPTEPG]; 238 while (pte < epte) { 239 *pte++ = PG_NV; 240 } 241 } else 242 #endif 243 { 244 /* 245 * Map the page table pages in both the HW segment table 246 * and the software Sysptmap. Note that Sysptmap is also 247 * considered a PT page hence the +1. 248 */ 249 ste = (u_int *)kstpa; 250 pte = (u_int *)kptmpa; 251 epte = &pte[nptpages+1]; 252 protoste = kptpa | SG_RW | SG_V; 253 protopte = kptpa | PG_RW | PG_CI | PG_V; 254 while (pte < epte) { 255 *ste++ = protoste; 256 *pte++ = protopte; 257 protoste += NBPG; 258 protopte += NBPG; 259 } 260 /* 261 * Invalidate all but the last remaining entries in both. 262 */ 263 epte = &((u_int *)kptmpa)[NPTEPG]; 264 while (pte < epte) { 265 *ste++ = SG_NV; 266 *pte++ = PG_NV; 267 } 268 } 269 270 /* 271 * Initialize kernel page table. 272 * Start by invalidating the `nptpages' that we have allocated. 273 */ 274 pte = (u_int *)kptpa; 275 epte = &pte[nptpages * NPTEPG]; 276 while (pte < epte) 277 *pte++ = PG_NV; 278 /* 279 * Validate PTEs for kernel text (RO) 280 */ 281 pte = &((u_int *)kptpa)[m68k_btop(KERNBASE)]; 282 epte = &pte[m68k_btop(m68k_trunc_page(&etext))]; 283 protopte = firstpa | PG_RO | PG_V; 284 while (pte < epte) { 285 *pte++ = protopte; 286 protopte += NBPG; 287 } 288 /* 289 * Validate PTEs for kernel data/bss, dynamic data allocated 290 * by us so far (nextpa - firstpa bytes), and pages for proc0 291 * u-area and page table allocated below (RW). 292 */ 293 epte = &((u_int *)kptpa)[m68k_btop(nextpa - firstpa)]; 294 protopte = (protopte & ~PG_PROT) | PG_RW; 295 /* 296 * Enable copy-back caching of data pages 297 */ 298 if (RELOC(mmutype, int) == MMU_68040) 299 protopte |= PG_CCB; 300 while (pte < epte) { 301 *pte++ = protopte; 302 protopte += NBPG; 303 } 304 305 /* 306 * Finally, validate the internal IO space PTEs (RW+CI). 307 */ 308 pte = (u_int *)iiopa; 309 epte = (u_int *)eiiopa; 310 protopte = RELOC(intiobase_phys, u_int) | PG_RW | PG_CI | PG_V; 311 while (pte < epte) { 312 *pte++ = protopte; 313 protopte += NBPG; 314 } 315 316 /* 317 * Calculate important exported kernel virtual addresses 318 */ 319 /* 320 * Sysseg: base of kernel segment table 321 */ 322 RELOC(Sysseg, st_entry_t *) = 323 (st_entry_t *)(kstpa - firstpa); 324 /* 325 * Sysptmap: base of kernel page table map 326 */ 327 RELOC(Sysptmap, pt_entry_t *) = 328 (pt_entry_t *)(kptmpa - firstpa); 329 /* 330 * Sysmap: kernel page table (as mapped through Sysptmap) 331 * Immediately follows `nptpages' of static kernel page table. 332 */ 333 RELOC(Sysmap, pt_entry_t *) = 334 (pt_entry_t *)m68k_ptob(nptpages * NPTEPG); 335 /* 336 * intiobase, intiolimit: base and end of internal IO space. 337 * iiomapsize pages prior to external IO space at end of static 338 * kernel page table. 339 */ 340 RELOC(intiobase, char *) = 341 (char *)m68k_ptob(nptpages*NPTEPG - iiomapsize); 342 RELOC(intiolimit, char *) = 343 (char *)m68k_ptob(nptpages*NPTEPG); 344 345 /* 346 * Setup u-area for process 0. 347 */ 348 /* 349 * Zero the u-area. 350 * NOTE: `pte' and `epte' aren't PTEs here. 351 */ 352 pte = (u_int *)p0upa; 353 epte = (u_int *)(p0upa + USPACE); 354 while (pte < epte) 355 *pte++ = 0; 356 /* 357 * Remember the u-area address so it can be loaded in the 358 * proc struct p_addr field later. 359 */ 360 RELOC(proc0paddr, char *) = (char *)(p0upa - firstpa); 361 362 RELOC(avail_start, paddr_t) = nextpa; 363 RELOC(avail_end, paddr_t) = m68k_ptob(RELOC(maxmem, int)) - 364 (m68k_round_page(MSGBUFSIZE)); 365 RELOC(mem_size, vsize_t) = m68k_ptob(RELOC(physmem, int)); 366 367 RELOC(virtual_avail, vaddr_t) = 368 VM_MIN_KERNEL_ADDRESS + (vaddr_t)(nextpa - firstpa); 369 RELOC(virtual_end, vaddr_t) = VM_MAX_KERNEL_ADDRESS; 370 371 /* 372 * Initialize protection array. 373 * XXX don't use a switch statement, it might produce an 374 * absolute "jmp" table. 375 */ 376 { 377 int *kp; 378 379 kp = &RELOC(protection_codes, int); 380 kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_NONE] = 0; 381 kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_NONE] = PG_RO; 382 kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO; 383 kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO; 384 kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW; 385 kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW; 386 kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW; 387 kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW; 388 } 389 390 /* 391 * Kernel page/segment table allocated above, 392 * just initialize pointers. 393 */ 394 { 395 struct pmap *kpm = &RELOC(kernel_pmap_store, struct pmap); 396 397 kpm->pm_stab = RELOC(Sysseg, st_entry_t *); 398 kpm->pm_ptab = RELOC(Sysmap, pt_entry_t *); 399 simple_lock_init(&kpm->pm_lock); 400 kpm->pm_count = 1; 401 kpm->pm_stpa = (st_entry_t *)kstpa; 402 /* 403 * For the 040 we also initialize the free level 2 404 * descriptor mask noting that we have used: 405 * 0: level 1 table 406 * 1 to `num': map page tables 407 * MAXKL2SIZE-1: maps last-page page table 408 */ 409 if (RELOC(mmutype, int) == MMU_68040) { 410 int num; 411 412 kpm->pm_stfree = ~l2tobm(0); 413 num = roundup((nptpages + 1) * (NPTEPG / SG4_LEV3SIZE), 414 SG4_LEV2SIZE) / SG4_LEV2SIZE; 415 while (num) 416 kpm->pm_stfree &= ~l2tobm(num--); 417 kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1); 418 for (num = MAXKL2SIZE; 419 num < sizeof(kpm->pm_stfree)*NBBY; 420 num++) 421 kpm->pm_stfree &= ~l2tobm(num); 422 } 423 } 424 425 /* 426 * Allocate some fixed, special purpose kernel virtual addresses 427 */ 428 { 429 vaddr_t va = RELOC(virtual_avail, vaddr_t); 430 431 RELOC(CADDR1, caddr_t) = (caddr_t)va; 432 va += NBPG; 433 RELOC(CADDR2, caddr_t) = (caddr_t)va; 434 va += NBPG; 435 RELOC(vmmap, caddr_t) = (caddr_t)va; 436 va += NBPG; 437 RELOC(msgbufaddr, caddr_t) = (caddr_t)va; 438 va += m68k_round_page(MSGBUFSIZE); 439 RELOC(virtual_avail, vaddr_t) = va; 440 } 441 } 442