1# 2# $NetBSD: changes,v 1.1 2000/04/14 20:24:36 is Exp $ 3# 4 5#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 6# MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 7# M68000 Hi-Performance Microprocessor Division 8# M68060 Software Package Production Release 9# 10# M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc. 11# All rights reserved. 12# 13# THE SOFTWARE is provided on an "AS IS" basis and without warranty. 14# To the maximum extent permitted by applicable law, 15# MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 16# INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS 17# FOR A PARTICULAR PURPOSE and any warranty against infringement with 18# regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 19# and any accompanying written materials. 20# 21# To the maximum extent permitted by applicable law, 22# IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 23# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 24# BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 25# ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 26# 27# Motorola assumes no responsibility for the maintenance and support 28# of the SOFTWARE. 29# 30# You are hereby granted a copyright license to use, modify, and distribute the 31# SOFTWARE so long as this entire notice is retained without alteration 32# in any modified and/or redistributed versions, and that such modified 33# versions are clearly identified as such. 34# No licenses are granted by implication, estoppel or otherwise under any 35# patents or trademarks of Motorola, Inc. 36#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 38CHANGES SINCE LAST RELEASE: 39--------------------------- 40 411) "movep" emulation where data was being read from memory 42was reading the intermediate bytes. Emulation now only 43reads the required bytes. 44 452) "flogn", "flog2", and "flog10" of "1" was setting the 46Inexact FPSR bit. Emulation now does not set Inexact for 47this case. 48 493) For an opclass three FP instruction where the effective addressing 50mode was pre-decrement or post-increment and the address register 51was A0 or A1, the address register was not being updated as a result 52of the operation. This has been corrected. 53 544) Beta 1.2 version had the following erratum: 55 56 Scenario: 57 --------- 58 If {i,d}mem_{read,write}_{byte,word,long}() returns 59 a failing value to the 68060SP, the package ignores 60 this return value and continues with program execution 61 as if it never received a failing value. 62 63 Effect: 64 ------- 65 For example, if a user executed "fsin.x ADDR,fp0" where 66 ADDR should cause a "segmentation violation", the memory read 67 requested by the package should return a failing value 68 to the package. Since the package currently ignores this 69 return value, the user program will continue to the 70 next instruction, and the result created in fp0 will be 71 undefined. 72 73 Fix: 74 ---- 75 This has been fixed in the current release. 76 77 Notes: 78 ------ 79 Upon receiving a non-zero (failing) return value from 80 a {i,d}mem_{read,write}_{byte,word,long}() "call-out", 81 the package creates a 16-byte access error stack frame 82 from the current exception stack frame and exits 83 through the "call-out" _real_access(). This is the process 84 as described in the MC68060 User's Manual. 85 86 For instruction read access errors, the info stacked is: 87 SR = SR at time of exception 88 PC = PC of instruction being emulated 89 VOFF = $4008 (stack frame format type) 90 ADDRESS = PC of instruction being emulated 91 FSLW = FAULT STATUS LONGWORD 92 93 The valid FSLW bits are: 94 bit 27 = 1 (misaligned bit) 95 bit 24 = 1 (read) 96 bit 23 = 0 (write) 97 bit 22:21 = 10 (SIZE = word) 98 bit 20:19 = 00 (TT) 99 bit 18:16 = x10 (TM; x = 1 for supervisor mode) 100 bit 15 = 1 (IO) 101 bit 0 = 1 (Software Emulation Error) 102 103 all other bits are EQUAL TO ZERO and can be set by the _real_access() 104 "call-out" stub by the user as appropriate. The MC68060 User's Manual 105 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 106 other bits. 107 108 For data read/write access errors, the info stacked is: 109 SR = SR at time of exception 110 PC = PC of instruction being emulated 111 VOFF = $4008 (stack frame format type) 112 ADDRESS = Address of source or destination operand 113 FSLW = FAULT STATUS LONGWORD 114 115 The valid FSLW bits are: 116 bit 27 = 0 (misaligned bit) 117 bit 24 = x (read; 1 if read, 0 if write) 118 bit 23 = x (write; 1 if write, 0 if read) 119 bit 22:21 = xx (SIZE; see MC68060 User's Manual) 120 bit 20:19 = 00 (TT) 121 bit 18:16 = x01 (TM; x = 1 for supervisor mode) 122 bit 15 = 0 (IO) 123 bit 0 = 1 (Software Emulation Error) 124 125 all other bits are EQUAL TO ZERO and can be set by the _real_access() 126 "call-out" stub by the user as appropriate. The MC68060 User's Manual 127 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 128 other bits. 129