1# 2# $NetBSD: fplsp.doc,v 1.1 2000/04/14 20:24:37 is Exp $ 3# 4 5#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 6# MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 7# M68000 Hi-Performance Microprocessor Division 8# M68060 Software Package Production Release 9# 10# M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc. 11# All rights reserved. 12# 13# THE SOFTWARE is provided on an "AS IS" basis and without warranty. 14# To the maximum extent permitted by applicable law, 15# MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 16# INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS 17# FOR A PARTICULAR PURPOSE and any warranty against infringement with 18# regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 19# and any accompanying written materials. 20# 21# To the maximum extent permitted by applicable law, 22# IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 23# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 24# BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 25# ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 26# 27# Motorola assumes no responsibility for the maintenance and support 28# of the SOFTWARE. 29# 30# You are hereby granted a copyright license to use, modify, and distribute the 31# SOFTWARE so long as this entire notice is retained without alteration 32# in any modified and/or redistributed versions, and that such modified 33# versions are clearly identified as such. 34# No licenses are granted by implication, estoppel or otherwise under any 35# patents or trademarks of Motorola, Inc. 36#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 3868060 FLOATING-POINT SOFTWARE PACKAGE (Library version) 39-------------------------------------------------------- 40 41The file fplsp.sa contains the "Library version" of the 4268060SP Floating-Point Software Package. The routines 43included in this module can be used to emulate the 44FP instructions not implemented in 68060 hardware. These 45instructions normally take exception vector #11 46"FP Unimplemented Instruction". 47 48By re-compiling a program that uses these instructions, and 49making subroutine calls in place of the unimplemented 50instructions, a program can avoid the overhead associated 51with taking the exception. 52 53Release file format: 54-------------------- 55The file fplsp.sa is essentially a hexadecimal image of the 56release package. This is the ONLY format which will be supported. 57The hex image was created by assembling the source code and 58then converting the resulting binary output image into an 59ASCII text file. The hexadecimal numbers are listed 60using the Motorola Assembly Syntax assembler directive "dc.l" 61(define constant longword). The file can be converted to other 62assembly syntaxes by using any word processor with a global 63search and replace function. 64 65To assist in assembling and linking this module with other modules, 66the installer should add a symbolic label to the top of the file. 67This will allow calling routines to access the entry points 68of this package. 69 70The source code fplsp.s has also been included but only for 71documentation purposes. 72 73Release file structure: 74----------------------- 75The file fplsp.sa contains an "Entry-Point" section and a 76code section. The FPLSP has no "Call-Out" section. The first section 77is the "Entry-Point" section. In order to access a function in the 78package, a program must "bsr" or "jsr" to the location listed 79below in "68060FPLSP entry points" that corresponds to the desired 80function. A branch instruction located at the selected entry point 81within the package will then enter the correct emulation code routine. 82 83The entry point addresses at the beginning of the package will remain 84fixed so that a program calling the routines will not have to be 85re-compiled with every new 68060FPLSP release. 86 87There are 3 entry-points for each instruction type: single precision, 88double precision, and extended precision. 89 90As an example, the "fsin" library instruction can be passed an 91extended precision operand if program executes: 92 93# fsin.x fp0 94 95 fmovm.x &0x01,-(%sp) # pass operand on stack 96 bsr.l _060FPLSP_TOP+0x1a8 # branch to fsin routine 97 add.l &0xc,%sp # clear operand from stack 98 99Upon return, fp0 holds the correct result. The FPSR is 100set correctly. The FPCR is unchanged. The FPIAR is undefined. 101 102Another example. This time, a dyadic operation: 103 104# frem.s %fp1,%fp0 105 106 fmov.s %fp1,-(%sp) # pass src operand 107 fmov.s %fp0,-(%sp) # pass dst operand 108 bsr.l _060FPLSP_TOP+0x168 # branch to frem routine 109 addq.l &0x8,%sp # clear operands from stack 110 111Again, the result is returned in fp0. Note that BOTH operands 112are passed in single precision format. 113 114Exception reporting: 115-------------------- 116The package takes exceptions according to the FPCR value upon subroutine 117entry. If an exception should be reported, then the package forces 118this exception using implemented floating-point instructions. 119For example, if the instruction being emulated should cause a 120floating-point Operand Error exception, then the library routine 121executes an FMUL of a zero and an infinity to force the OPERR 122exception. Although the FPIAR will be undefined for the enabled 123Operand Error exception handler, the user will at least be able 124to record that the event occurred. 125 126Miscellaneous: 127-------------- 128The package does not attempt to correctly emulate instructions 129with Signalling NAN inputs. Use of SNANs should be avoided with 130this package. 131 132The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points 133are provided for the convenience of older compilers that make 134subroutine calls for all fp instructions. The code does NOT emulate 135the instruction but rather simply executes it. 136 13768060FPLSP entry points: 138------------------------ 139_060FPLSP_TOP: 1400x000: _060LSP__facoss_ 1410x008: _060LSP__facosd_ 1420x010: _060LSP__facosx_ 1430x018: _060LSP__fasins_ 1440x020: _060LSP__fasind_ 1450x028: _060LSP__fasinx_ 1460x030: _060LSP__fatans_ 1470x038: _060LSP__fatand_ 1480x040: _060LSP__fatanx_ 1490x048: _060LSP__fatanhs_ 1500x050: _060LSP__fatanhd_ 1510x058: _060LSP__fatanhx_ 1520x060: _060LSP__fcoss_ 1530x068: _060LSP__fcosd_ 1540x070: _060LSP__fcosx_ 1550x078: _060LSP__fcoshs_ 1560x080: _060LSP__fcoshd_ 1570x088: _060LSP__fcoshx_ 1580x090: _060LSP__fetoxs_ 1590x098: _060LSP__fetoxd_ 1600x0a0: _060LSP__fetoxx_ 1610x0a8: _060LSP__fetoxm1s_ 1620x0b0: _060LSP__fetoxm1d_ 1630x0b8: _060LSP__fetoxm1x_ 1640x0c0: _060LSP__fgetexps_ 1650x0c8: _060LSP__fgetexpd_ 1660x0d0: _060LSP__fgetexpx_ 1670x0d8: _060LSP__fgetmans_ 1680x0e0: _060LSP__fgetmand_ 1690x0e8: _060LSP__fgetmanx_ 1700x0f0: _060LSP__flog10s_ 1710x0f8: _060LSP__flog10d_ 1720x100: _060LSP__flog10x_ 1730x108: _060LSP__flog2s_ 1740x110: _060LSP__flog2d_ 1750x118: _060LSP__flog2x_ 1760x120: _060LSP__flogns_ 1770x128: _060LSP__flognd_ 1780x130: _060LSP__flognx_ 1790x138: _060LSP__flognp1s_ 1800x140: _060LSP__flognp1d_ 1810x148: _060LSP__flognp1x_ 1820x150: _060LSP__fmods_ 1830x158: _060LSP__fmodd_ 1840x160: _060LSP__fmodx_ 1850x168: _060LSP__frems_ 1860x170: _060LSP__fremd_ 1870x178: _060LSP__fremx_ 1880x180: _060LSP__fscales_ 1890x188: _060LSP__fscaled_ 1900x190: _060LSP__fscalex_ 1910x198: _060LSP__fsins_ 1920x1a0: _060LSP__fsind_ 1930x1a8: _060LSP__fsinx_ 1940x1b0: _060LSP__fsincoss_ 1950x1b8: _060LSP__fsincosd_ 1960x1c0: _060LSP__fsincosx_ 1970x1c8: _060LSP__fsinhs_ 1980x1d0: _060LSP__fsinhd_ 1990x1d8: _060LSP__fsinhx_ 2000x1e0: _060LSP__ftans_ 2010x1e8: _060LSP__ftand_ 2020x1f0: _060LSP__ftanx_ 2030x1f8: _060LSP__ftanhs_ 2040x200: _060LSP__ftanhd_ 2050x208: _060LSP__ftanhx_ 2060x210: _060LSP__ftentoxs_ 2070x218: _060LSP__ftentoxd_ 2080x220: _060LSP__ftentoxx_ 2090x228: _060LSP__ftwotoxs_ 2100x230: _060LSP__ftwotoxd_ 2110x238: _060LSP__ftwotoxx_ 212 2130x240: _060LSP__fabss_ 2140x248: _060LSP__fabsd_ 2150x250: _060LSP__fabsx_ 2160x258: _060LSP__fadds_ 2170x260: _060LSP__faddd_ 2180x268: _060LSP__faddx_ 2190x270: _060LSP__fdivs_ 2200x278: _060LSP__fdivd_ 2210x280: _060LSP__fdivx_ 2220x288: _060LSP__fints_ 2230x290: _060LSP__fintd_ 2240x298: _060LSP__fintx_ 2250x2a0: _060LSP__fintrzs_ 2260x2a8: _060LSP__fintrzd_ 2270x2b0: _060LSP__fintrzx_ 2280x2b8: _060LSP__fmuls_ 2290x2c0: _060LSP__fmuld_ 2300x2c8: _060LSP__fmulx_ 2310x2d0: _060LSP__fnegs_ 2320x2d8: _060LSP__fnegd_ 2330x2e0: _060LSP__fnegx_ 2340x2e8: _060LSP__fsqrts_ 2350x2f0: _060LSP__fsqrtd_ 2360x2f8: _060LSP__fsqrtx_ 2370x300: _060LSP__fsubs_ 2380x308: _060LSP__fsubd_ 2390x310: _060LSP__fsubx_ 240