1 /* $NetBSD: fpu_arith.h,v 1.2 1999/05/30 20:17:48 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93 45 */ 46 47 /* 48 * Extended-precision arithmetic. 49 * 50 * We hold the notion of a `carry register', which may or may not be a 51 * machine carry bit or register. On the SPARC, it is just the machine's 52 * carry bit. 53 * 54 * In the worst case, you can compute the carry from x+y as 55 * (unsigned)(x + y) < (unsigned)x 56 * and from x+y+c as 57 * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0) 58 * for example. 59 */ 60 61 #ifndef FPE_USE_ASM 62 63 /* set up for extended-precision arithemtic */ 64 #define FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp; 65 66 /* 67 * We have three kinds of add: 68 * add with carry: r = x + y + c 69 * add (ignoring current carry) and set carry: c'r = x + y + 0 70 * add with carry and set carry: c'r = x + y + c 71 * The macros use `C' for `use carry' and `S' for `set carry'. 72 * Note that the state of the carry is undefined after ADDC and SUBC, 73 * so if all you have for these is `add with carry and set carry', 74 * that is OK. 75 * 76 * The same goes for subtract, except that we compute x - y - c. 77 * 78 * Finally, we have a way to get the carry into a `regular' variable, 79 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 80 * into carry; GET_CARRY sets its argument to 0 or 1. 81 */ 82 #define FPU_ADDC(r, x, y) \ 83 (r) = (x) + (y) + (!!fpu_carry) 84 #define FPU_ADDS(r, x, y) \ 85 { \ 86 fpu_tmp = (quad_t)(x) + (quad_t)(y); \ 87 (r) = (u_int)fpu_tmp; \ 88 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 89 } 90 #define FPU_ADDCS(r, x, y) \ 91 { \ 92 fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \ 93 (r) = (u_int)fpu_tmp; \ 94 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 95 } 96 #define FPU_SUBC(r, x, y) \ 97 (r) = (x) - (y) - (!!fpu_carry) 98 #define FPU_SUBS(r, x, y) \ 99 { \ 100 fpu_tmp = (quad_t)(x) - (quad_t)(y); \ 101 (r) = (u_int)fpu_tmp; \ 102 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 103 } 104 #define FPU_SUBCS(r, x, y) \ 105 { \ 106 fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \ 107 (r) = (u_int)fpu_tmp; \ 108 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ 109 } 110 111 #define FPU_GET_CARRY(r) (r) = (!!fpu_carry) 112 #define FPU_SET_CARRY(v) fpu_carry = ((v) != 0) 113 114 #else 115 116 /* set up for extended-precision arithemtic */ 117 #define FPU_DECL_CARRY register int fpu_tmp; 118 119 /* 120 * We have three kinds of add: 121 * add with carry: r = x + y + c 122 * add (ignoring current carry) and set carry: c'r = x + y + 0 123 * add with carry and set carry: c'r = x + y + c 124 * The macros use `C' for `use carry' and `S' for `set carry'. 125 * Note that the state of the carry is undefined after ADDC and SUBC, 126 * so if all you have for these is `add with carry and set carry', 127 * that is OK. 128 * 129 * The same goes for subtract, except that we compute x - y - c. 130 * 131 * Finally, we have a way to get the carry into a `regular' variable, 132 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 133 * into carry; GET_CARRY sets its argument to 0 or 1. 134 */ 135 #define FPU_ADDC(r, x, y) \ 136 { \ 137 asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 138 asm volatile("addxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \ 139 asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 140 } 141 #define FPU_ADDS(r, x, y) \ 142 { \ 143 asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 144 asm volatile("addl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \ 145 asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 146 } 147 #define FPU_ADDCS(r, x, y) FPU_ADDC(r, x, y) 148 149 #define FPU_SUBC(r, x, y) \ 150 { \ 151 asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 152 asm volatile("subxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \ 153 asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 154 } 155 #define FPU_SUBS(r, x, y) \ 156 { \ 157 asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \ 158 asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \ 159 asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \ 160 } 161 #define FPU_SUBCS(r, x, y) FPU_SUBC(r, x, y) 162 163 #define FPU_GET_CARRY(r) \ 164 { \ 165 asm volatile("moveq #0,%0" : "=d"(r)); \ 166 asm volatile("addxl %0,%0" : "+d"(r)); \ 167 } 168 #define FPU_SET_CARRY(v) \ 169 { \ 170 asm volatile("moveq #0,%0" : "=d"(fpu_tmp)); \ 171 asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(v)); \ 172 } 173 174 #endif /* FPE_USE_ASM */ 175