1 /* $NetBSD: cacheops_40.h,v 1.6 2002/11/03 01:34:42 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Leo Weppelman 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Invalidate entire TLB. 41 */ 42 static __inline void __attribute__((__unused__)) 43 TBIA_40(void) 44 { 45 __asm __volatile (" .word 0xf518" ); /* pflusha */ 46 } 47 48 /* 49 * Invalidate any TLB entry for given VA (TB Invalidate Single) 50 */ 51 static __inline void __attribute__((__unused__)) 52 TBIS_40(vaddr_t va) 53 { 54 register vaddr_t r_va __asm("%a0") = va; 55 int tmp; 56 57 __asm __volatile (" movc %1, %%dfc;" /* select supervisor */ 58 " .word 0xf508;" /* pflush %a0@ */ 59 " moveq %3, %1;" /* select user */ 60 " movc %1, %%dfc;" 61 " .word 0xf508;" : "=d" (tmp) : 62 "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD)); 63 } 64 65 /* 66 * Invalidate supervisor side of TLB 67 */ 68 static __inline void __attribute__((__unused__)) 69 TBIAS_40(void) 70 { 71 /* 72 * Cannot specify supervisor/user on pflusha, so we flush all 73 */ 74 __asm __volatile (" .word 0xf518;"); 75 } 76 77 /* 78 * Invalidate user side of TLB 79 */ 80 static __inline void __attribute__((__unused__)) 81 TBIAU_40(void) 82 { 83 /* 84 * Cannot specify supervisor/user on pflusha, so we flush all 85 */ 86 __asm __volatile (" .word 0xf518;"); 87 } 88 89 /* 90 * Invalidate instruction cache 91 */ 92 static __inline void __attribute__((__unused__)) 93 ICIA_40(void) 94 { 95 __asm __volatile (" .word 0xf498;"); /* cinva ic */ 96 } 97 98 static __inline void __attribute__((__unused__)) 99 ICPA_40(void) 100 { 101 __asm __volatile (" .word 0xf498;"); /* cinva ic */ 102 } 103 104 /* 105 * Invalidate data cache. 106 */ 107 static __inline void __attribute__((__unused__)) 108 DCIA_40(void) 109 { 110 __asm __volatile (" .word 0xf478;"); /* cpusha dc */ 111 } 112 113 static __inline void __attribute__((__unused__)) 114 DCIS_40(void) 115 { 116 __asm __volatile (" .word 0xf478;"); /* cpusha dc */ 117 } 118 119 static __inline void __attribute__((__unused__)) 120 DCIU_40(void) 121 { 122 __asm __volatile (" .word 0xf478;"); /* cpusha dc */ 123 } 124 125 static __inline void __attribute__((__unused__)) 126 DCIAS_40(paddr_t pa) 127 { 128 register paddr_t r_pa __asm("%a0") = pa; 129 130 __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */ 131 } 132 133 static __inline void __attribute__((__unused__)) 134 PCIA_40(void) 135 { 136 __asm __volatile (" .word 0xf478;"); /* cpusha dc */ 137 } 138 139 static __inline void __attribute__((__unused__)) 140 DCFA_40(void) 141 { 142 __asm __volatile (" .word 0xf478;"); /* cpusha dc */ 143 } 144 145 /* invalidate instruction physical cache line */ 146 static __inline void __attribute__((__unused__)) 147 ICPL_40(paddr_t pa) 148 { 149 register paddr_t r_pa __asm("%a0") = pa; 150 151 __asm __volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,%a0@ */ 152 } 153 154 /* invalidate instruction physical cache page */ 155 static __inline void __attribute__((__unused__)) 156 ICPP_40(paddr_t pa) 157 { 158 register paddr_t r_pa __asm("%a0") = pa; 159 160 __asm __volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,%a0@ */ 161 } 162 163 /* invalidate data physical cache line */ 164 static __inline void __attribute__((__unused__)) 165 DCPL_40(paddr_t pa) 166 { 167 register paddr_t r_pa __asm("%a0") = pa; 168 169 __asm __volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,%a0@ */ 170 } 171 172 /* invalidate data physical cache page */ 173 static __inline void __attribute__((__unused__)) 174 DCPP_40(paddr_t pa) 175 { 176 register paddr_t r_pa __asm("%a0") = pa; 177 178 __asm __volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,%a0@ */ 179 } 180 181 /* invalidate data physical all */ 182 static __inline void __attribute__((__unused__)) 183 DCPA_40(void) 184 { 185 __asm __volatile (" .word 0xf458;"); /* cinva dc */ 186 } 187 188 /* data cache flush line */ 189 static __inline void __attribute__((__unused__)) 190 DCFL_40(paddr_t pa) 191 { 192 register paddr_t r_pa __asm("%a0") = pa; 193 194 __asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */ 195 } 196 197 /* data cache flush page */ 198 static __inline void __attribute__((__unused__)) 199 DCFP_40(paddr_t pa) 200 { 201 register paddr_t r_pa __asm("%a0") = pa; 202 203 __asm __volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,%a0@ */ 204 } 205