xref: /netbsd/sys/arch/m68k/include/pte_motorola.h (revision 6550d01e)
1 /*	$NetBSD: pte_motorola.h,v 1.7 2009/12/07 14:23:45 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1986, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: pte.h 1.13 92/01/20$
36  *
37  *	@(#)pte.h	8.1 (Berkeley) 6/10/93
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: pte.h 1.13 92/01/20$
75  *
76  *	@(#)pte.h	8.1 (Berkeley) 6/10/93
77  */
78 
79 #ifndef	_MACHINE_PTE_H_
80 #define	_MACHINE_PTE_H_
81 
82 /*
83  * m68k motorola MMU segment/page table entries
84  */
85 
86 typedef u_int	st_entry_t;	/* segment table entry */
87 typedef u_int	pt_entry_t;	/* page table entry */
88 
89 #define	PT_ENTRY_NULL	NULL
90 #define	ST_ENTRY_NULL	NULL
91 
92 #define PG_SHIFT	PGSHIFT
93 
94 #define	SG_V		0x00000002	/* segment is valid */
95 #define	SG_NV		0x00000000
96 #define	SG_PROT		0x00000004	/* access protection mask */
97 #define	SG_RO		0x00000004
98 #define	SG_RW		0x00000000
99 #define	SG_U		0x00000008	/* modified bit (68040) */
100 #define	SG_FRAME	((~0) << PG_SHIFT)
101 #define	SG_ISHIFT	((PG_SHIFT << 1) - 2)	/* 24 or 22 */
102 #define	SG_IMASK	((~0) << SG_ISHIFT)
103 #define	SG_PSHIFT	PG_SHIFT
104 #define	SG_PMASK	(((~0) << SG_PSHIFT) & ~SG_IMASK)
105 
106 /* 68040 additions */
107 #define	SG4_MASK1	0xfe000000
108 #define	SG4_SHIFT1	25
109 #define	SG4_MASK2	0x01fc0000
110 #define	SG4_SHIFT2	18
111 #define	SG4_MASK3	(((~0) << PG_SHIFT) & ~(SG4_MASK1 | SG4_MASK2))
112 #define	SG4_SHIFT3	PG_SHIFT
113 #define	SG4_ADDR1	0xfffffe00
114 #define	SG4_ADDR2	((~0) << (20 - PG_SHIFT))
115 #define	SG4_LEV1SIZE	128
116 #define	SG4_LEV2SIZE	128
117 #define	SG4_LEV3SIZE	(1 << (SG4_SHIFT2 - PG_SHIFT))	/* 64 or 32 */
118 
119 #define	PG_V		0x00000001
120 #define	PG_NV		0x00000000
121 #define	PG_PROT		0x00000004
122 #define	PG_U		0x00000008
123 #define	PG_M		0x00000010
124 #define	PG_W		0x00000100
125 #define	PG_RO		0x00000004
126 #define	PG_RW		0x00000000
127 #define	PG_FRAME	((~0) << PG_SHIFT)
128 #define	PG_CI		0x00000040
129 #define	PG_PFNUM(x)	(((x) & PG_FRAME) >> PG_SHIFT)
130 
131 /* 68040 additions */
132 #define	PG_CMASK	0x00000060	/* cache mode mask */
133 #define	PG_CWT		0x00000000	/* writethrough caching */
134 #define	PG_CCB		0x00000020	/* copyback caching */
135 #define	PG_CIS		0x00000040	/* cache inhibited serialized */
136 #define	PG_CIN		0x00000060	/* cache inhibited nonserialized */
137 #define	PG_SO		0x00000080	/* supervisor only */
138 
139 #define M68K_STSIZE	(MAXUL2SIZE * SG4_LEV2SIZE * sizeof(st_entry_t))
140 					/* user process segment table size */
141 #define M68K_MAX_PTSIZE	(1 << (32 - PG_SHIFT + 2))	/* max size of UPT */
142 #define M68K_MAX_KPTSIZE	(M68K_MAX_PTSIZE >> 2)	/* max memory to allocate to KPT */
143 #define M68K_PTBASE	0x10000000	/* UPT map base address */
144 #define M68K_PTMAXSIZE	0x70000000	/* UPT map maximum size */
145 
146 /*
147  * Kernel virtual address to page table entry and to physical address.
148  */
149 
150 #ifdef cesfic
151 #define	kvtopte(va) \
152 	(&Sysmap[((unsigned)(va)) >> PGSHIFT])
153 #else
154 #define	kvtopte(va) \
155 	(&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT])
156 #endif
157 
158 #endif /* !_MACHINE_PTE_H_ */
159