1 /* $NetBSD: pte_motorola.h,v 1.1 2002/10/14 05:18:45 chs Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1986, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: pte.h 1.13 92/01/20$ 41 * 42 * @(#)pte.h 8.1 (Berkeley) 6/10/93 43 */ 44 45 #ifndef _MACHINE_PTE_H_ 46 #define _MACHINE_PTE_H_ 47 48 /* 49 * m68k motorola MMU segment/page table entries 50 */ 51 52 typedef int st_entry_t; /* segment table entry */ 53 typedef int pt_entry_t; /* page table entry */ 54 55 #define PT_ENTRY_NULL NULL 56 #define ST_ENTRY_NULL NULL 57 58 #if defined(amiga) || defined(atari) 59 #define PG_SHIFT 13 60 #else 61 #define PG_SHIFT 12 62 #endif 63 64 #define SG_V 0x00000002 /* segment is valid */ 65 #define SG_NV 0x00000000 66 #define SG_PROT 0x00000004 /* access protection mask */ 67 #define SG_RO 0x00000004 68 #define SG_RW 0x00000000 69 #define SG_U 0x00000008 /* modified bit (68040) */ 70 #define SG_FRAME ((~0) << PG_SHIFT) 71 #define SG_ISHIFT ((PG_SHIFT << 1) - 2) /* 24 or 22 */ 72 #define SG_IMASK ((~0) << SG_ISHIFT) 73 #define SG_PSHIFT PG_SHIFT 74 #define SG_PMASK (((~0) << SG_PSHIFT) & ~SG_IMASK) 75 76 /* 68040 additions */ 77 #define SG4_MASK1 0xfe000000 78 #define SG4_SHIFT1 25 79 #define SG4_MASK2 0x01fc0000 80 #define SG4_SHIFT2 18 81 #define SG4_MASK3 (((~0) << PG_SHIFT) & ~(SG4_MASK1 | SG4_MASK2)) 82 #define SG4_SHIFT3 PG_SHIFT 83 #define SG4_ADDR1 0xfffffe00 84 #define SG4_ADDR2 ((~0) << (20 - PG_SHIFT)) 85 #define SG4_LEV1SIZE 128 86 #define SG4_LEV2SIZE 128 87 #define SG4_LEV3SIZE (1 << (SG4_SHIFT2 - PG_SHIFT)) /* 64 or 32 */ 88 89 #define PG_V 0x00000001 90 #define PG_NV 0x00000000 91 #define PG_PROT 0x00000004 92 #define PG_U 0x00000008 93 #define PG_M 0x00000010 94 #define PG_W 0x00000100 95 #define PG_RO 0x00000004 96 #define PG_RW 0x00000000 97 #define PG_FRAME ((~0) << PG_SHIFT) 98 #define PG_CI 0x00000040 99 #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) 100 101 /* 68040 additions */ 102 #define PG_CMASK 0x00000060 /* cache mode mask */ 103 #define PG_CWT 0x00000000 /* writethrough caching */ 104 #define PG_CCB 0x00000020 /* copyback caching */ 105 #define PG_CIS 0x00000040 /* cache inhibited serialized */ 106 #define PG_CIN 0x00000060 /* cache inhibited nonserialized */ 107 #define PG_SO 0x00000080 /* supervisor only */ 108 109 #define M68K_STSIZE (MAXUL2SIZE * SG4_LEV2SIZE * sizeof(st_entry_t)) 110 /* user process segment table size */ 111 #define M68K_MAX_PTSIZE 0x400000 /* max size of UPT */ 112 #define M68K_MAX_KPTSIZE 0x100000 /* max memory to allocate to KPT */ 113 #define M68K_PTBASE 0x10000000 /* UPT map base address */ 114 #define M68K_PTMAXSIZE 0x70000000 /* UPT map maximum size */ 115 116 /* 117 * Kernel virtual address to page table entry and to physical address. 118 */ 119 120 #ifdef cesfic 121 #define kvtopte(va) \ 122 (&Sysmap[((unsigned)(va)) >> PGSHIFT]) 123 #else 124 #define kvtopte(va) \ 125 (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) 126 #endif 127 128 #endif /* !_MACHINE_PTE_H_ */ 129