xref: /netbsd/sys/arch/m68k/m68k/db_memrw.c (revision c4a72b64)
1 /*	$NetBSD: db_memrw.c,v 1.4 2002/11/02 20:26:39 chs Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross and Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 /*
39  * Mach Operating System
40  * Copyright (c) 1992 Carnegie Mellon University
41  * All Rights Reserved.
42  *
43  * Permission to use, copy, modify and distribute this software and its
44  * documentation is hereby granted, provided that both the copyright
45  * notice and this permission notice appear in all copies of the
46  * software, derivative works or modified versions, and any portions
47  * thereof, and that both notices appear in supporting documentation.
48  *
49  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
50  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
51  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
52  *
53  * Carnegie Mellon requests users of this software to return to
54  *
55  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
56  *  School of Computer Science
57  *  Carnegie Mellon University
58  *  Pittsburgh PA 15213-3890
59  *
60  * any improvements or extensions that they make and grant Carnegie Mellon
61  * the rights to redistribute these changes.
62  */
63 
64 /*
65  * Interface to the debugger for virtual memory read/write.
66  * This file is shared by DDB and KGDB, and must work even
67  * when only KGDB is included (thus no db_printf calls).
68  *
69  * To write in the text segment, we have to first make
70  * the page writable, do the write, then restore the PTE.
71  * For writes outside the text segment, and all reads,
72  * just do the access -- if it causes a fault, the debugger
73  * will recover with a longjmp to an appropriate place.
74  *
75  * ALERT!  If you want to access device registers with a
76  * specific size, then the read/write functions have to
77  * make sure to do the correct sized pointer access.
78  */
79 
80 #include <sys/cdefs.h>
81 __KERNEL_RCSID(0, "$NetBSD: db_memrw.c,v 1.4 2002/11/02 20:26:39 chs Exp $");
82 
83 #include <sys/param.h>
84 
85 #include <machine/cpu.h>
86 #include <m68k/cacheops.h>
87 #include <uvm/uvm_extern.h>
88 
89 #include <machine/db_machdep.h>
90 #include <ddb/db_access.h>
91 
92 /*
93  * Read bytes from kernel address space for debugger.
94  */
95 void
96 db_read_bytes(db_addr_t addr, size_t size, char *data)
97 {
98 	char *src = (char *)addr;
99 
100 	if (size == 4) {
101 		*((uint32_t *)data) = *((uint32_t *)src);
102 		return;
103 	}
104 
105 	if (size == 2) {
106 		*((uint16_t *)data) = *((uint16_t *)src);
107 		return;
108 	}
109 
110 	while (size-- > 0) {
111 		*data++ = *src++;
112 	}
113 }
114 
115 static void
116 db_write_text(db_addr_t addr, size_t size, char *data)
117 {
118 	char *dst, *odst;
119 	pt_entry_t *pte, oldpte, tmppte;
120 	vaddr_t pgva;
121 	int limit;
122 
123 	dst = (char *)addr;
124 	while (size > 0) {
125 
126 		/*
127 		 * Get the VA for the page.
128 		 */
129 		pgva = trunc_page((vaddr_t)dst);
130 
131 		/*
132 		 * Save this destination address, for TLB flush.
133 		 */
134 		odst = dst;
135 
136 		/*
137 		 * Compute number of bytes that can be written
138 		 * with this mapping and subtract it from the total size.
139 		 */
140 		limit = round_page((vaddr_t)dst + 1) - (vaddr_t)dst;
141 		if (limit > size)
142 			limit = size;
143 		size -= limit;
144 
145 #ifdef M68K_MMU_HP
146 		/*
147 		 * Flush the supervisor side of the VAC to
148 		 * prevent a cache hit on the old, read-only PTE.
149 		 */
150 		if (ectype == EC_VIRT)
151 			DCIS();
152 #endif
153 
154 		/*
155 		 * Make the page writable.  Note the mapping is
156 		 * cache-inhibited to save hair.
157 		 */
158 		pte = kvtopte(pgva);
159 		oldpte = *pte;
160 		if ((oldpte & PG_V) == 0) {
161 			printf(" address %p not a valid page\n", dst);
162 			return;
163 		}
164 		tmppte = (oldpte & ~PG_RO) | PG_RW | PG_CI;
165 		*pte = tmppte;
166 		TBIS((vaddr_t)odst);
167 
168 		/*
169 		 * Page is now writable.  Do as much access as we can.
170 		 */
171 		for (; limit > 0; limit--)
172 			*dst++ = *data++;
173 
174 		/*
175 		 * Restore the old PTE.
176 		 */
177 		*pte = oldpte;
178 		TBIS((vaddr_t)odst);
179 	}
180 
181 	/*
182 	 * Invalidate the instruction cache so our changes take effect.
183 	 */
184 	ICIA();
185 }
186 
187 /*
188  * Write bytes to kernel address space for debugger.
189  */
190 void
191 db_write_bytes(db_addr_t addr, size_t size, char *data)
192 {
193 	char *dst = (char *)addr;
194 	extern char kernel_text[], etext[];
195 
196 	/* If any part is in kernel text, use db_write_text() */
197 	if (dst + size > kernel_text && dst < etext) {
198 		db_write_text(addr, size, data);
199 		return;
200 	}
201 
202 	if (size == 4) {
203 		*((uint32_t *)dst) = *((uint32_t *)data);
204 		return;
205 	}
206 
207 	if (size == 2) {
208 		*((uint16_t *)dst) = *((uint16_t *)data);
209 		return;
210 	}
211 
212 	while (size-- > 0) {
213 		*dst++ = *data++;
214 	}
215 }
216