1 /* $NetBSD: zs.c,v 1.58 2009/10/27 03:45:32 snj Exp $ */ 2 3 /* 4 * Copyright (c) 1996-1998 Bill Studenmund 5 * Copyright (c) 1995 Gordon W. Ross 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Zilog Z8530 Dual UART driver (machine-dependent part) 31 * 32 * Runs two serial lines per chip using slave drivers. 33 * Plain tty/async lines use the zs_async slave. 34 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 35 * Other ports use their own mice & keyboard slaves. 36 * 37 * Credits & history: 38 * 39 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 40 * (port-sun3?) zs.c driver (which was in turn based on code in the 41 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 42 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de 43 * Brouwer field-tested the driver at a local ISP. 44 * 45 * Bill Studenmund and Gordon Ross then ported the machine-independent 46 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 47 * intermediate version (mac68k using a local, patched version of 48 * the m.i. drivers), with NetBSD 1.3 containing a full version. 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.58 2009/10/27 03:45:32 snj Exp $"); 53 54 #include "opt_ddb.h" 55 #include "opt_mac68k.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/proc.h> 60 #include <sys/device.h> 61 #include <sys/conf.h> 62 #include <sys/file.h> 63 #include <sys/ioctl.h> 64 #include <sys/tty.h> 65 #include <sys/time.h> 66 #include <sys/kernel.h> 67 #include <sys/syslog.h> 68 #include <sys/cpu.h> 69 #include <sys/intr.h> 70 71 #include <machine/autoconf.h> 72 #include <machine/psc.h> 73 #include <machine/viareg.h> 74 75 #include <dev/cons.h> 76 #include <dev/ic/z8530reg.h> 77 #include <machine/z8530var.h> 78 #include <mac68k/dev/zs_cons.h> 79 80 /* Are these in a header file anywhere? */ 81 /* Booter flags interface */ 82 #define ZSMAC_RAW 0x01 83 #define ZSMAC_LOCALTALK 0x02 84 85 #define PCLK (9600 * 384) 86 87 /* 88 * Some warts needed by z8530tty.c - 89 */ 90 int zs_def_cflag = (CREAD | CS8 | HUPCL); 91 92 /* 93 * abort detection on console will now timeout after iterating on a loop 94 * the following # of times. Cheep hack. Also, abort detection is turned 95 * off after a timeout (i.e. maybe there's not a terminal hooked up). 96 */ 97 #define ZSABORT_DELAY 3000000 98 99 /* 100 * Define interrupt levels. 101 */ 102 #define ZSHARD_PRI 4 /* Wired on the CPU board... */ 103 /* 104 * Serial port cards with zs chips on them are actually at the 105 * NuBus interrupt level, which is lower than 4. But blocking 106 * level 4 interrupts will block those interrupts too, so level 107 * 4 is fine. 108 */ 109 110 /* The layout of this is hardware-dependent (padding, order). */ 111 struct zschan { 112 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */ 113 uint8_t zc_xxx0; 114 uint8_t zc_xxx1; /* part of the other channel lives here! */ 115 uint8_t zc_xxx2; /* Yea Apple! */ 116 volatile uint8_t zc_data; /* data */ 117 uint8_t zc_xxx3; 118 uint8_t zc_xxx4; 119 uint8_t zc_xxx5; 120 }; 121 122 /* Flags from cninit() */ 123 static int zs_hwflags[2]; 124 /* Default speed for each channel */ 125 static int zs_defspeed[2] = { 126 9600, /* tty00 */ 127 9600, /* tty01 */ 128 }; 129 /* console stuff */ 130 void *zs_conschan; 131 int zs_consunit; 132 #ifdef ZS_CONSOLE_ABORT 133 int zs_cons_canabort = 1; 134 #else 135 int zs_cons_canabort = 0; 136 #endif /* ZS_CONSOLE_ABORT*/ 137 /* device to which the console is attached--if serial. */ 138 dev_t mac68k_zsdev; 139 /* Mac stuff */ 140 extern volatile unsigned char *sccA; 141 142 int zs_cn_check_speed(int); 143 144 /* 145 * Even though zsparam will set up the clock multiples, etc., we 146 * still set them here as: 1) mice & keyboards don't use zsparam, 147 * and 2) the console stuff uses these defaults before device 148 * attach. 149 */ 150 151 static uint8_t zs_init_reg[16] = { 152 0, /* 0: CMD (reset, etc.) */ 153 0, /* 1: No interrupts yet. */ 154 0x18 + ZSHARD_PRI, /* IVECT */ 155 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 156 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 157 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 158 0, /* 6: TXSYNC/SYNCLO */ 159 0, /* 7: RXSYNC/SYNCHI */ 160 0, /* 8: alias for data port */ 161 ZSWR9_MASTER_IE, 162 0, /*10: Misc. TX/RX control bits */ 163 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 164 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 165 0, /*13: BAUDHI (default=9600) */ 166 ZSWR14_BAUD_ENA, 167 ZSWR15_BREAK_IE, 168 }; 169 170 struct zschan * 171 zs_get_chan_addr(int channel) 172 { 173 char *addr; 174 struct zschan *zc; 175 176 addr = (char *)__UNVOLATILE(sccA); 177 if (channel == 0) { 178 zc = (struct zschan *)(addr + 2); 179 /* handle the fact the ports are intertwined. */ 180 } else { 181 zc = (struct zschan *)(addr); 182 } 183 return (zc); 184 } 185 186 187 /* Find PROM mappings (for console support). */ 188 int zsinited = 0; /* 0 = not, 1 = inited, not attached, 2= attached */ 189 190 void 191 zs_init(void) 192 { 193 zsinited = 1; 194 if (zs_conschan != 0){ /* we might have moved io under the console */ 195 zs_conschan = zs_get_chan_addr(zs_consunit); 196 /* so recalc the console port */ 197 } 198 } 199 200 201 /**************************************************************** 202 * Autoconfig 203 ****************************************************************/ 204 205 /* Definition of the driver for autoconfig. */ 206 static int zsc_match(device_t, cfdata_t, void *); 207 static void zsc_attach(device_t, device_t, void *); 208 static int zsc_print(void *, const char *); 209 210 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc), 211 zsc_match, zsc_attach, NULL, NULL); 212 213 extern struct cfdriver zsc_cd; 214 215 int zshard(void *); 216 217 /* 218 * Is the zs chip present? 219 */ 220 static int 221 zsc_match(device_t parent, cfdata_t cf, void *aux) 222 { 223 if (zsinited == 2) 224 return 0; 225 226 return 1; 227 } 228 229 /* 230 * Attach a found zs. 231 * 232 * Match slave number to zs unit number, so that misconfiguration will 233 * not set up the keyboard as ttya, etc. 234 */ 235 static void 236 zsc_attach(device_t parent, device_t self, void *aux) 237 { 238 struct zsc_softc *zsc = device_private(self); 239 struct zsc_attach_args zsc_args; 240 volatile struct zschan *zc; 241 struct xzs_chanstate *xcs; 242 struct zs_chanstate *cs; 243 int s, chip, theflags, channel; 244 245 zsc->zsc_dev = self; 246 if (!zsinited) 247 zs_init(); 248 zsinited = 2; 249 250 chip = 0; /* We'll deal with chip types post 1.2 */ 251 aprint_normal(" chip type %d \n",chip); 252 253 /* 254 * Initialize software state for each channel. 255 */ 256 for (channel = 0; channel < 2; channel++) { 257 zsc_args.channel = channel; 258 zsc_args.hwflags = zs_hwflags[channel]; 259 xcs = &zsc->xzsc_xcs_store[channel]; 260 cs = &xcs->xzs_cs; 261 zsc->zsc_cs[channel] = cs; 262 263 zs_lock_init(cs); 264 cs->cs_channel = channel; 265 cs->cs_private = NULL; 266 cs->cs_ops = &zsops_null; 267 268 zc = zs_get_chan_addr(channel); 269 cs->cs_reg_csr = &zc->zc_csr; 270 cs->cs_reg_data = &zc->zc_data; 271 272 memcpy(cs->cs_creg, zs_init_reg, 16); 273 memcpy(cs->cs_preg, zs_init_reg, 16); 274 275 /* Current BAUD rate generator clock. */ 276 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */ 277 cs->cs_defspeed = zs_defspeed[channel]; 278 cs->cs_defcflag = zs_def_cflag; 279 280 /* Make these correspond to cs_defcflag (-crtscts) */ 281 cs->cs_rr0_dcd = ZSRR0_DCD; 282 cs->cs_rr0_cts = 0; 283 cs->cs_wr5_dtr = ZSWR5_DTR; 284 cs->cs_wr5_rts = 0; 285 286 #ifdef __notyet__ 287 cs->cs_slave_type = ZS_SLAVE_NONE; 288 #endif 289 290 /* Define BAUD rate stuff. */ 291 xcs->cs_clocks[0].clk = PCLK; 292 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 293 xcs->cs_clocks[1].flags = 294 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 295 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 296 xcs->cs_clock_count = 3; 297 if (channel == 0) { 298 theflags = mac68k_machine.modem_flags; 299 xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk; 300 xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk; 301 } else { 302 theflags = mac68k_machine.print_flags; 303 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 304 /* 305 * Yes, we aren't defining ANY clock source enables for the 306 * printer's DCD clock in. The hardware won't let us 307 * use it. But a clock will freak out the chip, so we 308 * let you set it, telling us to bar interrupts on the line. 309 */ 310 xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk; 311 xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk; 312 } 313 if (xcs->cs_clocks[1].clk) 314 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 315 if (xcs->cs_clocks[2].clk) 316 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 317 318 printf("zsc%d channel %d: d_speed %6d DCD clk %ld CTS clk %ld", 319 device_unit(self), channel, cs->cs_defspeed, 320 xcs->cs_clocks[1].clk, xcs->cs_clocks[2].clk); 321 322 /* Set defaults in our "extended" chanstate. */ 323 xcs->cs_csource = 0; 324 xcs->cs_psource = 0; 325 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 326 xcs->cs_pclk_flag = 0; 327 328 if (theflags & ZSMAC_RAW) { 329 zsc_args.hwflags |= ZS_HWFLAG_RAW; 330 printf(" (raw defaults)"); 331 } 332 333 /* 334 * XXX - This might be better done with a "stub" driver 335 * (to replace zstty) that ignores LocalTalk for now. 336 */ 337 if (theflags & ZSMAC_LOCALTALK) { 338 printf(" shielding from LocalTalk"); 339 cs->cs_defspeed = 1; 340 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff; 341 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff; 342 zs_write_reg(cs, ZSRR_BAUDLO, 0xff); 343 zs_write_reg(cs, ZSRR_BAUDHI, 0xff); 344 /* 345 * If we might have LocalTalk, then make sure we have the 346 * Baud rate low-enough to not do any damage. 347 */ 348 } 349 350 /* 351 * We used to disable chip interrupts here, but we now 352 * do that in zscnprobe, just in case MacOS left the chip on. 353 */ 354 355 xcs->cs_chip = chip; 356 357 /* Stash away a copy of the final H/W flags. */ 358 xcs->cs_hwflags = zsc_args.hwflags; 359 360 printf("\n"); 361 362 /* 363 * Look for a child driver for this channel. 364 * The child attach will setup the hardware. 365 */ 366 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 367 /* No sub-driver. Just reset it. */ 368 uint8_t reset = (channel == 0) ? 369 ZSWR9_A_RESET : ZSWR9_B_RESET; 370 s = splzs(); 371 zs_write_reg(cs, 9, reset); 372 splx(s); 373 } 374 } 375 376 if (current_mac_model->class == MACH_CLASSAV) { 377 add_psc_lev4_intr(PSCINTR_SCCA, zshard, zsc); 378 add_psc_lev4_intr(PSCINTR_SCCB, zshard, zsc); 379 } else { 380 intr_establish(zshard, zsc, ZSHARD_PRI); 381 } 382 zsc->zsc_softintr_cookie = softint_establish(SOFTINT_SERIAL, 383 (void (*)(void *))zsc_intr_soft, zsc); 384 385 /* Now safe to enable interrupts. */ 386 387 /* 388 * Set the master interrupt enable and interrupt vector. 389 * (common to both channels, do it on A) 390 */ 391 cs = zsc->zsc_cs[0]; 392 s = splzs(); 393 /* interrupt vector */ 394 zs_write_reg(cs, 2, zs_init_reg[2]); 395 /* master interrupt control (enable) */ 396 zs_write_reg(cs, 9, zs_init_reg[9]); 397 splx(s); 398 } 399 400 static int 401 zsc_print(void *aux, const char *name) 402 { 403 struct zsc_attach_args *args = aux; 404 405 if (name != NULL) 406 aprint_normal("%s: ", name); 407 408 if (args->channel != -1) 409 aprint_normal(" channel %d", args->channel); 410 411 return UNCONF; 412 } 413 414 int 415 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data) 416 { 417 switch (cmd) { 418 default: 419 return (EPASSTHROUGH); 420 } 421 return (0); 422 } 423 424 void 425 zsmd_setclock(struct zs_chanstate *cs) 426 { 427 struct xzs_chanstate *xcs = (void *)cs; 428 429 if (cs->cs_channel != 0) 430 return; 431 432 /* 433 * If the new clock has the external bit set, then select the 434 * external source. 435 */ 436 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 437 } 438 439 /* 440 * Do the minimum work to pull data off of the chip and queue it up 441 * for later processing. 442 */ 443 int 444 zshard(void *arg) 445 { 446 struct zsc_softc *zsc = arg; 447 int rval; 448 449 if (zsc == NULL) 450 return 0; 451 452 rval = zsc_intr_hard(zsc); 453 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) { 454 softint_schedule(zsc->zsc_softintr_cookie); 455 } 456 return (rval); 457 } 458 459 #ifndef ZS_TOLERANCE 460 #define ZS_TOLERANCE 51 461 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 462 #endif 463 464 /* 465 * check out a rate for acceptability from the internal clock 466 * source. Used in console config to validate a requested 467 * default speed. Placed here so that all the speed checking code is 468 * in one place. 469 * 470 * != 0 means ok. 471 */ 472 int 473 zs_cn_check_speed(int bps) 474 { 475 int tc, rate; 476 477 tc = BPS_TO_TCONST(PCLK / 16, bps); 478 if (tc < 0) 479 return 0; 480 rate = TCONST_TO_BPS(PCLK / 16, tc); 481 if (ZS_TOLERANCE > abs(((rate - bps)*1000)/bps)) 482 return 1; 483 else 484 return 0; 485 } 486 487 /* 488 * Search through the signal sources in the channel, and 489 * pick the best one for the baud rate requested. Return 490 * a -1 if not achievable in tolerance. Otherwise return 0 491 * and fill in the values. 492 * 493 * This routine draws inspiration from the Atari port's zs.c 494 * driver in NetBSD 1.1 which did the same type of source switching. 495 * Tolerance code inspired by comspeed routine in isa/com.c. 496 * 497 * By Bill Studenmund, 1996-05-12 498 */ 499 int 500 zs_set_speed(struct zs_chanstate *cs, int bps) 501 { 502 struct xzs_chanstate *xcs = (void *) cs; 503 int i, tc, tc0 = 0, tc1, s, sf = 0; 504 int src, rate0, rate1, err, tol; 505 506 if (bps == 0) 507 return (0); 508 509 src = -1; /* no valid source yet */ 510 tol = ZS_TOLERANCE; 511 512 /* 513 * Step through all the sources and see which one matches 514 * the best. A source has to match BETTER than tol to be chosen. 515 * Thus if two sources give the same error, the first one will be 516 * chosen. Also, allow for the possability that one source might run 517 * both the BRG and the direct divider (i.e. RTxC). 518 */ 519 for (i=0; i < xcs->cs_clock_count; i++) { 520 if (xcs->cs_clocks[i].clk <= 0) 521 continue; /* skip non-existent or bad clocks */ 522 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 523 /* check out BRG at /16 */ 524 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 525 if (tc1 >= 0) { 526 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 527 err = abs(((rate1 - bps)*1000)/bps); 528 if (err < tol) { 529 tol = err; 530 src = i; 531 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 532 tc0 = tc1; 533 rate0 = rate1; 534 } 535 } 536 } 537 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 538 /* 539 * Check out either /1, /16, /32, or /64 540 * Note: for /1, you'd better be using a synchronized 541 * clock! 542 */ 543 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 544 int b1 = b0 >> 4, e1 = abs(b1-bps); 545 int b2 = b1 >> 1, e2 = abs(b2-bps); 546 int b3 = b2 >> 1, e3 = abs(b3-bps); 547 548 if (e0 < e1 && e0 < e2 && e0 < e3) { 549 err = e0; 550 rate1 = b0; 551 tc1 = ZSWR4_CLK_X1; 552 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 553 err = e1; 554 rate1 = b1; 555 tc1 = ZSWR4_CLK_X16; 556 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 557 err = e2; 558 rate1 = b2; 559 tc1 = ZSWR4_CLK_X32; 560 } else { 561 err = e3; 562 rate1 = b3; 563 tc1 = ZSWR4_CLK_X64; 564 } 565 566 err = (err * 1000)/bps; 567 if (err < tol) { 568 tol = err; 569 src = i; 570 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 571 tc0 = tc1; 572 rate0 = rate1; 573 } 574 } 575 } 576 #ifdef ZSMACDEBUG 577 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src); 578 #endif 579 if (src == -1) 580 return (EINVAL); /* no can do */ 581 582 /* 583 * The M.I. layer likes to keep cs_brg_clk current, even though 584 * we are the only ones who should be touching the BRG's rate. 585 * 586 * Note: we are assuming that any ZSC_EXTERN signal source comes in 587 * on the RTxC pin. Correct for the mac68k obio zsc. 588 */ 589 if (sf & ZSC_EXTERN) 590 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 591 else 592 cs->cs_brg_clk = PCLK / 16; 593 594 /* 595 * Now we have a source, so set it up. 596 */ 597 s = splzs(); 598 xcs->cs_psource = src; 599 xcs->cs_pclk_flag = sf; 600 bps = rate0; 601 if (sf & ZSC_BRG) { 602 cs->cs_preg[4] = ZSWR4_CLK_X16; 603 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 604 if (sf & ZSC_PCLK) { 605 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 606 } else { 607 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 608 } 609 tc = tc0; 610 } else { 611 cs->cs_preg[4] = tc0; 612 if (sf & ZSC_RTXDIV) { 613 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 614 } else { 615 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 616 } 617 cs->cs_preg[14]= 0; 618 tc = 0xffff; 619 } 620 /* Set the BAUD rate divisor. */ 621 cs->cs_preg[12] = tc; 622 cs->cs_preg[13] = tc >> 8; 623 splx(s); 624 625 #ifdef ZSMACDEBUG 626 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 627 bps, tc, src, sf); 628 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 629 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 630 #endif 631 632 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 633 634 /* Caller will stuff the pending registers. */ 635 return (0); 636 } 637 638 int 639 zs_set_modes(struct zs_chanstate *cs, int cflag) 640 { 641 struct xzs_chanstate *xcs = (void*)cs; 642 int s; 643 644 /* 645 * Make sure we don't enable hfc on a signal line we're ignoring. 646 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 647 * this code also effectivly turns off ZSWR15_CTS_IE. 648 * 649 * Also, disable DCD interrupts if we've been told to ignore 650 * the DCD pin. Happens on mac68k because the input line for 651 * DCD can also be used as a clock input. (Just set CLOCAL.) 652 * 653 * If someone tries to turn an invalid flow mode on, Just Say No 654 * (Suggested by gwr) 655 */ 656 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF))) 657 return (EINVAL); 658 cs->cs_rr0_pps = 0; 659 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 660 if (cflag & MDMBUF) 661 return (EINVAL); 662 cflag |= CLOCAL; 663 } else { 664 /* 665 * cs->cs_rr0_pps indicates which bit MAY be used for pps. 666 * Enable only if nothing else will want the interrupt and 667 * it's ok to enable interrupts on this line. 668 */ 669 if ((cflag & (CLOCAL | MDMBUF)) == CLOCAL) 670 cs->cs_rr0_pps = ZSRR0_DCD; 671 } 672 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS))) 673 return (EINVAL); 674 675 /* 676 * Output hardware flow control on the chip is horrendous: 677 * if carrier detect drops, the receiver is disabled, and if 678 * CTS drops, the transmitter is stoped IN MID CHARACTER! 679 * Therefore, NEVER set the HFC bit, and instead use the 680 * status interrupt to detect CTS changes. 681 */ 682 s = splzs(); 683 if ((cflag & (CLOCAL | MDMBUF)) != 0) 684 cs->cs_rr0_dcd = 0; 685 else 686 cs->cs_rr0_dcd = ZSRR0_DCD; 687 /* 688 * The mac hardware only has one output, DTR (HSKo in Mac 689 * parlance). In HFC mode, we use it for the functions 690 * typically served by RTS and DTR on other ports, so we 691 * have to fake the upper layer out some. 692 * 693 * CRTSCTS we use CTS as an input which tells us when to shut up. 694 * We make no effort to shut up the other side of the connection. 695 * DTR is used to hang up the modem. 696 * 697 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 698 * shut up the other side. 699 */ 700 if ((cflag & CRTSCTS) != 0) { 701 cs->cs_wr5_dtr = ZSWR5_DTR; 702 cs->cs_wr5_rts = 0; 703 cs->cs_rr0_cts = ZSRR0_CTS; 704 } else if ((cflag & CDTRCTS) != 0) { 705 cs->cs_wr5_dtr = 0; 706 cs->cs_wr5_rts = ZSWR5_DTR; 707 cs->cs_rr0_cts = ZSRR0_CTS; 708 } else if ((cflag & MDMBUF) != 0) { 709 cs->cs_wr5_dtr = 0; 710 cs->cs_wr5_rts = ZSWR5_DTR; 711 cs->cs_rr0_cts = ZSRR0_DCD; 712 } else { 713 cs->cs_wr5_dtr = ZSWR5_DTR; 714 cs->cs_wr5_rts = 0; 715 cs->cs_rr0_cts = 0; 716 } 717 splx(s); 718 719 /* Caller will stuff the pending registers. */ 720 return (0); 721 } 722 723 724 /* 725 * Read or write the chip with suitable delays. 726 * MacII hardware has the delay built in. 727 * No need for extra delay. :-) However, some clock-chirped 728 * macs, or zsc's on serial add-on boards might need it. 729 */ 730 #define ZS_DELAY() 731 732 uint8_t 733 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 734 { 735 uint8_t val; 736 737 *cs->cs_reg_csr = reg; 738 ZS_DELAY(); 739 val = *cs->cs_reg_csr; 740 ZS_DELAY(); 741 return val; 742 } 743 744 void 745 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 746 { 747 *cs->cs_reg_csr = reg; 748 ZS_DELAY(); 749 *cs->cs_reg_csr = val; 750 ZS_DELAY(); 751 } 752 753 uint8_t 754 zs_read_csr(struct zs_chanstate *cs) 755 { 756 uint8_t val; 757 758 val = *cs->cs_reg_csr; 759 ZS_DELAY(); 760 /* make up for the fact CTS is wired backwards */ 761 val ^= ZSRR0_CTS; 762 return val; 763 } 764 765 void 766 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 767 { 768 /* Note, the csr does not write CTS... */ 769 *cs->cs_reg_csr = val; 770 ZS_DELAY(); 771 } 772 773 uint8_t 774 zs_read_data(struct zs_chanstate *cs) 775 { 776 uint8_t val; 777 778 val = *cs->cs_reg_data; 779 ZS_DELAY(); 780 return val; 781 } 782 783 void 784 zs_write_data(struct zs_chanstate *cs, uint8_t val) 785 { 786 *cs->cs_reg_data = val; 787 ZS_DELAY(); 788 } 789 790 /**************************************************************** 791 * Console support functions (mac68k specific!) 792 * Note: this code is allowed to know about the layout of 793 * the chip registers, and uses that to keep things simple. 794 * XXX - I think I like the mvme167 code better. -gwr 795 * XXX - Well :-P :-) -wrs 796 ****************************************************************/ 797 798 #define zscnpollc nullcnpollc 799 cons_decl(zs); 800 801 static void zscnsetup(void); 802 803 /* 804 * Console functions. 805 */ 806 807 /* 808 * This code modled after the zs_setparam routine in zskgdb 809 * It sets the console unit to a known state so we can output 810 * correctly. 811 */ 812 static void 813 zscnsetup(void) 814 { 815 struct xzs_chanstate xcs; 816 struct zs_chanstate *cs; 817 struct zschan *zc; 818 int tconst, s; 819 820 /* Setup temporary chanstate. */ 821 memset(&xcs, 0, sizeof(xcs)); 822 cs = &xcs.xzs_cs; 823 zc = zs_conschan; 824 cs->cs_reg_csr = &zc->zc_csr; 825 cs->cs_reg_data = &zc->zc_data; 826 cs->cs_channel = zs_consunit; 827 cs->cs_brg_clk = PCLK / 16; 828 829 memcpy(cs->cs_preg, zs_init_reg, 16); 830 cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS; 831 cs->cs_preg[15] = ZSWR15_BREAK_IE; 832 tconst = BPS_TO_TCONST(cs->cs_brg_clk, zs_defspeed[zs_consunit]); 833 cs->cs_preg[12] = tconst; 834 cs->cs_preg[13] = tconst >> 8; 835 /* can't use zs_set_speed as we haven't set up the 836 * signal sources, and it's not worth it for now 837 */ 838 839 /* 840 * As zs_loadchannelregs doesn't touch reg 9 (interrupt control), 841 * we won't accidentally turn on interrupts below 842 */ 843 s = splhigh(); 844 zs_loadchannelregs(cs); 845 splx(s); 846 } 847 848 /* 849 * zscnprobe is the routine which gets called as the kernel is trying to 850 * figure out where the console should be. Each io driver which might 851 * be the console (as defined in mac68k/conf.c) gets probed. The probe 852 * fills in the consdev structure. Important parts are the device #, 853 * and the console priority. Values are CN_DEAD (don't touch me), 854 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL 855 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!) 856 * 857 * As the mac's a bit different, we do extra work here. We mainly check 858 * to see if we have serial echo going on. Also chould check for default 859 * speeds. 860 */ 861 void 862 zscnprobe(struct consdev * cp) 863 { 864 extern u_long IOBase; 865 int maj, unit, i; 866 extern const struct cdevsw zstty_cdevsw; 867 868 maj = cdevsw_lookup_major(&zstty_cdevsw); 869 if (maj != -1) { 870 cp->cn_pri = CN_NORMAL; /* Lower than CN_INTERNAL */ 871 if (mac68k_machine.serial_console != 0) { 872 cp->cn_pri = CN_REMOTE; /* Higher than CN_INTERNAL */ 873 mac68k_machine.serial_boot_echo =0; 874 } 875 876 unit = (mac68k_machine.serial_console == 1) ? 0 : 1; 877 zs_consunit = unit; 878 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */ 879 880 mac68k_zsdev = cp->cn_dev = makedev(maj, unit); 881 } 882 if (mac68k_machine.serial_boot_echo) { 883 /* 884 * at this point, we know that we don't have a serial 885 * console, but are doing echo 886 */ 887 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */ 888 zs_consunit = 1; 889 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE; 890 } 891 892 if ((i = mac68k_machine.modem_d_speed) > 0) { 893 if (zs_cn_check_speed(i)) 894 zs_defspeed[0] = i; 895 } 896 if ((i = mac68k_machine.print_d_speed) > 0) { 897 if (zs_cn_check_speed(i)) 898 zs_defspeed[1] = i; 899 } 900 mac68k_set_io_offsets(IOBase); 901 zs_init(); 902 /* 903 * zsinit will set up the addresses of the scc. It will also, if 904 * zs_conschan != 0, calculate the new address of the conschan for 905 * unit zs_consunit. So if we are (or think we are) going to use the 906 * chip for console I/O, we just set up the internal addresses for it. 907 * 908 * Now turn off interrupts for the chip. Note: using sccA to get at 909 * the chip is the only vestage of the NetBSD 1.0 ser driver. :-) 910 */ 911 unit = sccA[2]; /* reset reg. access */ 912 unit = sccA[0]; 913 sccA[2] = 9; sccA[2] = 0; /* write 0 to reg. 9, clearing MIE */ 914 sccA[2] = ZSWR0_CLR_INTR; unit = sccA[2]; /* reset any pending ints. */ 915 sccA[0] = ZSWR0_CLR_INTR; unit = sccA[0]; 916 917 if (mac68k_machine.serial_boot_echo) 918 zscnsetup(); 919 return; 920 } 921 922 void 923 zscninit(struct consdev *cp) 924 { 925 926 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE; 927 928 /* 929 * zsinit will set up the addresses of the scc. It will also, if 930 * zs_conschan != 0, calculate the new address of the conschan for 931 * unit zs_consunit. So zs_init implicitly sets zs_conschan to the right 932 * number. :-) 933 */ 934 zscnsetup(); 935 printf("\nNetBSD/mac68k console\n"); 936 } 937 938 939 /* 940 * Polled input char. 941 */ 942 int 943 zs_getc(void *arg) 944 { 945 volatile struct zschan *zc = arg; 946 int s, c, rr0; 947 948 s = splhigh(); 949 /* Wait for a character to arrive. */ 950 do { 951 rr0 = zc->zc_csr; 952 ZS_DELAY(); 953 } while ((rr0 & ZSRR0_RX_READY) == 0); 954 955 c = zc->zc_data; 956 ZS_DELAY(); 957 splx(s); 958 959 /* 960 * This is used by the kd driver to read scan codes, 961 * so don't translate '\r' ==> '\n' here... 962 */ 963 return (c); 964 } 965 966 /* 967 * Polled output char. 968 */ 969 void 970 zs_putc(void *arg, int c) 971 { 972 volatile struct zschan *zc = arg; 973 int s, rr0; 974 long wait = 0; 975 976 s = splhigh(); 977 /* Wait for transmitter to become ready. */ 978 do { 979 rr0 = zc->zc_csr; 980 ZS_DELAY(); 981 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 982 983 if ((rr0 & ZSRR0_TX_READY) != 0) { 984 zc->zc_data = c; 985 ZS_DELAY(); 986 } 987 splx(s); 988 } 989 990 991 /* 992 * Polled console input putchar. 993 */ 994 int 995 zscngetc(dev_t dev) 996 { 997 struct zschan *zc = zs_conschan; 998 int c; 999 1000 c = zs_getc(zc); 1001 return (c); 1002 } 1003 1004 /* 1005 * Polled console output putchar. 1006 */ 1007 void 1008 zscnputc(dev_t dev, int c) 1009 { 1010 struct zschan *zc = zs_conschan; 1011 1012 zs_putc(zc, c); 1013 } 1014 1015 1016 1017 /* 1018 * Handle user request to enter kernel debugger. 1019 */ 1020 void 1021 zs_abort(struct zs_chanstate *cs) 1022 { 1023 volatile struct zschan *zc = zs_conschan; 1024 int rr0; 1025 long wait = 0; 1026 1027 if (zs_cons_canabort == 0) 1028 return; 1029 1030 /* Wait for end of break to avoid PROM abort. */ 1031 do { 1032 rr0 = zc->zc_csr; 1033 ZS_DELAY(); 1034 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY)); 1035 1036 if (wait > ZSABORT_DELAY) { 1037 zs_cons_canabort = 0; 1038 /* If we time out, turn off the abort ability! */ 1039 } 1040 1041 #ifdef DDB 1042 Debugger(); 1043 #endif 1044 } 1045