xref: /netbsd/sys/arch/mac68k/mac68k/vectors.s (revision bf9ec67e)
1|	$NetBSD: vectors.s,v 1.14 1999/06/28 01:56:58 briggs Exp $
2
3| Copyright (c) 1988 University of Utah
4| Copyright (c) 1990 Regents of the University of California.
5| All rights reserved.
6|
7| Redistribution and use in source and binary forms, with or without
8| modification, are permitted provided that the following conditions
9| are met:
10| 1. Redistributions of source code must retain the above copyright
11|    notice, this list of conditions and the following disclaimer.
12| 2. Redistributions in binary form must reproduce the above copyright
13|    notice, this list of conditions and the following disclaimer in the
14|    documentation and/or other materials provided with the distribution.
15| 3. All advertising materials mentioning features or use of this software
16|    must display the following acknowledgement:
17|	This product includes software developed by the University of
18|	California, Berkeley and its contributors.
19| 4. Neither the name of the University nor the names of its contributors
20|    may be used to endorse or promote products derived from this software
21|    without specific prior written permission.
22|
23| THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24| ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25| IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26| ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27| FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28| DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29| OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30| HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31| LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32| OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33| SUCH DAMAGE.
34|
35|	@(#)vectors.s	7.2 (Berkeley) 5/7/91
36|
37
38#define	BADTRAP16	\
39	VECTOR(badtrap) ; VECTOR(badtrap) ; \
40	VECTOR(badtrap) ; VECTOR(badtrap) ; \
41	VECTOR(badtrap) ; VECTOR(badtrap) ; \
42	VECTOR(badtrap) ; VECTOR(badtrap) ; \
43	VECTOR(badtrap) ; VECTOR(badtrap) ; \
44	VECTOR(badtrap) ; VECTOR(badtrap) ; \
45	VECTOR(badtrap) ; VECTOR(badtrap) ; \
46	VECTOR(badtrap) ; VECTOR(badtrap)
47
48	.text
49GLOBAL(vectab)
50	VECTOR_UNUSED		/* 0: NOT USED (reset SSP) */
51	VECTOR_UNUSED		/* 1: NOT USED (reset PC) */
52	VECTOR_UNUSED		/* 2: bus error */
53	VECTOR_UNUSED		/* 3: address error */
54	VECTOR(illinst)		/* 4: illegal instruction */
55	VECTOR(zerodiv)		/* 5: zero divide */
56	VECTOR(chkinst)		/* 6: CHK instruction */
57	VECTOR(trapvinst)	/* 7: TRAPV instruction */
58	VECTOR(privinst)	/* 8: privilege violation */
59#if defined(MRG_TRACE)
60	VECTOR(mrg_tracetrap)	/* 9: trace */
61#else /* MRG_TRACE */
62	VECTOR(trace)		/* 9: trace */
63#endif /* MRG_TRACE */
64	VECTOR(alinetrap)	/* 10: line 1010 emulator ; see macromasm.s */
65	VECTOR(fpfline)		/* 11: line 1111 emulator */
66	VECTOR(badtrap)		/* 12: unassigned, reserved */
67	VECTOR(coperr)		/* 13: coprocessor protocol violation */
68	VECTOR(fmterr)		/* 14: format error */
69	VECTOR(badtrap)		/* 15: uninitialized interrupt vector */
70	VECTOR(badtrap)		/* 16: unassigned, reserved */
71	VECTOR(badtrap)		/* 17: unassigned, reserved */
72	VECTOR(badtrap)		/* 18: unassigned, reserved */
73	VECTOR(badtrap)		/* 19: unassigned, reserved */
74	VECTOR(badtrap)		/* 20: unassigned, reserved */
75	VECTOR(badtrap)		/* 21: unassigned, reserved */
76	VECTOR(badtrap)		/* 22: unassigned, reserved */
77	VECTOR(badtrap)		/* 23: unassigned, reserved */
78	VECTOR(spurintr)	/* 24: spurious interrupt */
79	VECTOR(intrhand)	/* 25: level 1 interrupt autovector */
80	VECTOR(intrhand)	/* 26: level 2 interrupt autovector */
81	VECTOR(intrhand)	/* 27: level 3 interrupt autovector */
82	VECTOR(intrhand)	/* 28: level 4 interrupt autovector */
83	VECTOR(intrhand)	/* 29: level 5 interrupt autovector */
84	VECTOR(intrhand)	/* 30: level 6 interrupt autovector */
85	VECTOR(lev7intr)	/* 31: level 7 interrupt autovector */
86	VECTOR(trap0)		/* 32: syscalls */
87#ifdef COMPAT_13
88	VECTOR(trap1)		/* 33: compat_13_sigreturn */
89#else
90	VECTOR(illinst)
91#endif
92	VECTOR(trap2)		/* 34: breakpoint or compat_13_sigreturn */
93	VECTOR(trap3)		/* 35: sigreturn special syscall */
94	VECTOR(illinst)		/* 36: TRAP instruction vector */
95	VECTOR(illinst)		/* 37: TRAP instruction vector */
96	VECTOR(illinst)		/* 38: TRAP instruction vector */
97	VECTOR(illinst)		/* 39: TRAP instruction vector */
98	VECTOR(illinst)		/* 40: TRAP instruction vector */
99	VECTOR(illinst)		/* 41: TRAP instruction vector */
100	VECTOR(illinst)		/* 42: TRAP instruction vector */
101	VECTOR(illinst)		/* 43: TRAP instruction vector */
102	VECTOR(trap12)		/* 44: TRAP instruction vector */
103	VECTOR(illinst)		/* 45: TRAP instruction vector */
104	VECTOR(illinst)		/* 46: TRAP instruction vector */
105	VECTOR(trap15)		/* 47: TRAP instruction vector */
106#ifdef FPSP
107 	ASVECTOR(bsun)		/* 48: FPCP branch/set on unordered cond */
108 	ASVECTOR(inex)		/* 49: FPCP inexact result */
109 	ASVECTOR(dz)		/* 50: FPCP divide by zero */
110 	ASVECTOR(unfl)		/* 51: FPCP underflow */
111 	ASVECTOR(operr)		/* 52: FPCP operand error */
112 	ASVECTOR(ovfl)		/* 53: FPCP overflow */
113 	ASVECTOR(snan)		/* 54: FPCP signalling NAN */
114#else
115 	VECTOR(fpfault)		/* 48: FPCP branch/set on unordered cond */
116 	VECTOR(fpfault)		/* 49: FPCP inexact result */
117 	VECTOR(fpfault)		/* 50: FPCP divide by zero */
118 	VECTOR(fpfault)		/* 51: FPCP underflow */
119 	VECTOR(fpfault)		/* 52: FPCP operand error */
120 	VECTOR(fpfault)		/* 53: FPCP overflow */
121 	VECTOR(fpfault)		/* 54: FPCP signalling NAN */
122#endif
123	VECTOR(fpunsupp)	/* 55: FPCP unimplemented data type */
124	VECTOR(badtrap)		/* 56: unassigned, reserved */
125	VECTOR(badtrap)		/* 57: unassigned, reserved */
126	VECTOR(badtrap)		/* 58: unassigned, reserved */
127	VECTOR(badtrap)		/* 59: unassigned, reserved */
128	VECTOR(badtrap)		/* 60: unassigned, reserved */
129	VECTOR(badtrap)		/* 61: unassigned, reserved */
130	VECTOR(badtrap)		/* 62: unassigned, reserved */
131	VECTOR(badtrap)		/* 63: unassigned, reserved */
132
133	BADTRAP16		/* 64-255: user interrupt vectors */
134	BADTRAP16		/* 64-255: user interrupt vectors */
135	BADTRAP16		/* 64-255: user interrupt vectors */
136	BADTRAP16		/* 64-255: user interrupt vectors */
137	BADTRAP16		/* 64-255: user interrupt vectors */
138	BADTRAP16		/* 64-255: user interrupt vectors */
139	BADTRAP16		/* 64-255: user interrupt vectors */
140	BADTRAP16		/* 64-255: user interrupt vectors */
141	BADTRAP16		/* 64-255: user interrupt vectors */
142	BADTRAP16		/* 64-255: user interrupt vectors */
143	BADTRAP16		/* 64-255: user interrupt vectors */
144	BADTRAP16		/* 64-255: user interrupt vectors */
145