1 /* $NetBSD: sbc_obio.c,v 1.16 2002/10/02 05:36:39 thorpej Exp $ */ 2 3 /* 4 * Copyright (C) 1996,1997 Scott Reynolds. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/types.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/errno.h> 34 #include <sys/device.h> 35 #include <sys/buf.h> 36 #include <sys/proc.h> 37 #include <sys/user.h> 38 39 #include <dev/scsipi/scsi_all.h> 40 #include <dev/scsipi/scsipi_all.h> 41 #include <dev/scsipi/scsipi_debug.h> 42 #include <dev/scsipi/scsiconf.h> 43 44 #include <dev/ic/ncr5380reg.h> 45 #include <dev/ic/ncr5380var.h> 46 47 #include <machine/cpu.h> 48 #include <machine/viareg.h> 49 50 #include <mac68k/dev/sbcreg.h> 51 #include <mac68k/dev/sbcvar.h> 52 53 /* 54 * From Guide to the Macintosh Family Hardware, pp. 137-143 55 * These are offsets from SCSIBase (see pmap_bootstrap.c) 56 */ 57 #define SBC_REG_OFS 0x10000 58 #define SBC_DMA_OFS 0x12000 59 #define SBC_HSK_OFS 0x06000 60 61 #define SBC_DMA_OFS_PB500 0x06000 62 63 #define SBC_REG_OFS_IIFX 0x08000 /* Just guessing... */ 64 #define SBC_DMA_OFS_IIFX 0x0c000 65 #define SBC_HSK_OFS_IIFX 0x0e000 66 67 #define SBC_REG_OFS_DUO2 0x00000 68 #define SBC_DMA_OFS_DUO2 0x02000 69 #define SBC_HSK_OFS_DUO2 0x04000 70 71 static int sbc_obio_match __P((struct device *, struct cfdata *, void *)); 72 static void sbc_obio_attach __P((struct device *, struct device *, void *)); 73 74 void sbc_intr_enable __P((struct ncr5380_softc *)); 75 void sbc_intr_disable __P((struct ncr5380_softc *)); 76 void sbc_obio_clrintr __P((struct ncr5380_softc *)); 77 78 CFATTACH_DECL(sbc_obio, sizeof(struct sbc_softc), 79 sbc_obio_match, sbc_obio_attach, NULL, NULL); 80 81 static int 82 sbc_obio_match(parent, cf, args) 83 struct device *parent; 84 struct cfdata *cf; 85 void *args; 86 { 87 switch (current_mac_model->machineid) { 88 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 89 /* 90 if (cf->cf_unit == 0) 91 return 1; 92 */ 93 break; 94 case MACH_MACPB210: 95 case MACH_MACPB230: 96 case MACH_MACPB250: 97 case MACH_MACPB270: 98 case MACH_MACPB280: 99 case MACH_MACPB280C: 100 if (cf->cf_unit == 1) 101 return 1; 102 /*FALLTHROUGH*/ 103 default: 104 if (cf->cf_unit == 0 && mac68k_machine.scsi80) 105 return 1; 106 } 107 return 0; 108 } 109 110 static void 111 sbc_obio_attach(parent, self, args) 112 struct device *parent, *self; 113 void *args; 114 { 115 struct sbc_softc *sc = (struct sbc_softc *) self; 116 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *) sc; 117 char bits[64]; 118 extern vaddr_t SCSIBase; 119 120 /* Pull in the options flags. */ 121 sc->sc_options = ((ncr_sc->sc_dev.dv_cfdata->cf_flags | sbc_options) 122 & SBC_OPTIONS_MASK); 123 124 /* 125 * Set up offsets to 5380 registers and GLUE I/O space, and turn 126 * off options we know we can't support on certain models. 127 */ 128 switch (current_mac_model->machineid) { 129 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 130 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX); 131 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS_IIFX); 132 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_IIFX); 133 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 134 break; 135 case MACH_MACPB500: 136 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 137 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); /*??*/ 138 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_PB500); 139 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 140 break; 141 case MACH_MACPB210: 142 case MACH_MACPB230: 143 case MACH_MACPB250: 144 case MACH_MACPB270: 145 case MACH_MACPB280: 146 case MACH_MACPB280C: 147 if (ncr_sc->sc_dev.dv_unit == 1) { 148 sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2); 149 sc->sc_drq_addr = (vaddr_t)(0xfee00000 + SBC_HSK_OFS_DUO2); 150 sc->sc_nodrq_addr = (vaddr_t)(0xfee00000 + SBC_DMA_OFS_DUO2); 151 break; 152 } 153 /*FALLTHROUGH*/ 154 default: 155 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 156 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); 157 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS); 158 break; 159 } 160 161 /* 162 * Initialize fields used by the MI code 163 */ 164 ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg; 165 ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg; 166 ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg; 167 ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg; 168 ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg; 169 ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg; 170 ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg; 171 ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg; 172 173 ncr_sc->sc_rev = NCR_VARIANT_NCR5380; 174 175 /* 176 * MD function pointers used by the MI code. 177 */ 178 if (sc->sc_options & SBC_PDMA) { 179 ncr_sc->sc_pio_out = sbc_pdma_out; 180 ncr_sc->sc_pio_in = sbc_pdma_in; 181 } else { 182 ncr_sc->sc_pio_out = ncr5380_pio_out; 183 ncr_sc->sc_pio_in = ncr5380_pio_in; 184 } 185 ncr_sc->sc_dma_alloc = NULL; 186 ncr_sc->sc_dma_free = NULL; 187 ncr_sc->sc_dma_poll = NULL; 188 ncr_sc->sc_intr_on = NULL; 189 ncr_sc->sc_intr_off = NULL; 190 ncr_sc->sc_dma_setup = NULL; 191 ncr_sc->sc_dma_start = NULL; 192 ncr_sc->sc_dma_eop = NULL; 193 ncr_sc->sc_dma_stop = NULL; 194 ncr_sc->sc_flags = 0; 195 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 196 197 if (sc->sc_options & SBC_INTR) { 198 ncr_sc->sc_dma_alloc = sbc_dma_alloc; 199 ncr_sc->sc_dma_free = sbc_dma_free; 200 ncr_sc->sc_dma_poll = sbc_dma_poll; 201 ncr_sc->sc_dma_setup = sbc_dma_setup; 202 ncr_sc->sc_dma_start = sbc_dma_start; 203 ncr_sc->sc_dma_eop = sbc_dma_eop; 204 ncr_sc->sc_dma_stop = sbc_dma_stop; 205 via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc); 206 } 207 208 via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc); 209 sc->sc_clrintr = sbc_obio_clrintr; 210 211 if ((sc->sc_options & SBC_RESELECT) == 0) 212 ncr_sc->sc_no_disconnect = 0xff; 213 214 if (sc->sc_options) 215 printf(": options=%s", bitmask_snprintf(sc->sc_options, 216 SBC_OPTIONS_BITS, bits, sizeof(bits))); 217 printf("\n"); 218 219 if (sc->sc_options & (SBC_INTR|SBC_RESELECT)) { 220 /* Enable SCSI interrupts through VIA2 */ 221 sbc_intr_enable(ncr_sc); 222 } 223 224 #ifdef SBC_DEBUG 225 if (sbc_debug) 226 printf("%s: softc=%p regs=%p\n", ncr_sc->sc_dev.dv_xname, 227 sc, sc->sc_regs); 228 #endif 229 230 ncr_sc->sc_channel.chan_id = 7; 231 ncr_sc->sc_adapter.adapt_minphys = minphys; 232 233 /* 234 * Initialize the SCSI controller itself. 235 */ 236 ncr5380_attach(ncr_sc); 237 } 238 239 /* 240 * Interrupt support routines. 241 */ 242 void 243 sbc_intr_enable(ncr_sc) 244 struct ncr5380_softc *ncr_sc; 245 { 246 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 247 int s, flags; 248 249 flags = V2IF_SCSIIRQ; 250 if (sc->sc_options & SBC_INTR) 251 flags |= V2IF_SCSIDRQ; 252 253 s = splhigh(); 254 if (VIA2 == VIA2OFF) 255 via2_reg(vIER) = 0x80 | flags; 256 else 257 via2_reg(rIER) = 0x80 | flags; 258 splx(s); 259 } 260 261 void 262 sbc_intr_disable(ncr_sc) 263 struct ncr5380_softc *ncr_sc; 264 { 265 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 266 int s, flags; 267 268 flags = V2IF_SCSIIRQ; 269 if (sc->sc_options & SBC_INTR) 270 flags |= V2IF_SCSIDRQ; 271 272 s = splhigh(); 273 if (VIA2 == VIA2OFF) 274 via2_reg(vIER) = flags; 275 else 276 via2_reg(rIER) = flags; 277 splx(s); 278 } 279 280 void 281 sbc_obio_clrintr(ncr_sc) 282 struct ncr5380_softc *ncr_sc; 283 { 284 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 285 int flags; 286 287 flags = V2IF_SCSIIRQ; 288 if (sc->sc_options & SBC_INTR) 289 flags |= V2IF_SCSIDRQ; 290 291 if (VIA2 == VIA2OFF) 292 via2_reg(vIFR) = 0x80 | flags; 293 else 294 via2_reg(rIFR) = 0x80 | flags; 295 } 296