1 /* $NetBSD: if_bm.c,v 1.43 2010/04/05 07:19:30 joerg Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.43 2010/04/05 07:19:30 joerg Exp $"); 31 32 #include "opt_inet.h" 33 34 #include <sys/param.h> 35 #include <sys/device.h> 36 #include <sys/ioctl.h> 37 #include <sys/kernel.h> 38 #include <sys/mbuf.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/callout.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 50 #include <net/bpf.h> 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 58 #include <dev/ofw/openfirm.h> 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <powerpc/spr.h> 65 #include <powerpc/oea/spr.h> 66 67 #include <machine/autoconf.h> 68 #include <machine/pio.h> 69 70 #include <macppc/dev/dbdma.h> 71 #include <macppc/dev/if_bmreg.h> 72 #include <macppc/dev/obiovar.h> 73 74 #define BMAC_TXBUFS 2 75 #define BMAC_RXBUFS 16 76 #define BMAC_BUFLEN 2048 77 78 struct bmac_softc { 79 struct device sc_dev; 80 struct ethercom sc_ethercom; 81 #define sc_if sc_ethercom.ec_if 82 struct callout sc_tick_ch; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 dbdma_regmap_t *sc_txdma; 86 dbdma_regmap_t *sc_rxdma; 87 dbdma_command_t *sc_txcmd; 88 dbdma_command_t *sc_rxcmd; 89 void *sc_txbuf; 90 void *sc_rxbuf; 91 int sc_rxlast; 92 int sc_flags; 93 struct mii_data sc_mii; 94 u_char sc_enaddr[6]; 95 }; 96 97 #define BMAC_BMACPLUS 0x01 98 #define BMAC_DEBUGFLAG 0x02 99 100 int bmac_match(struct device *, struct cfdata *, void *); 101 void bmac_attach(struct device *, struct device *, void *); 102 void bmac_reset_chip(struct bmac_softc *); 103 void bmac_init(struct bmac_softc *); 104 void bmac_init_dma(struct bmac_softc *); 105 int bmac_intr(void *); 106 int bmac_rint(void *); 107 void bmac_reset(struct bmac_softc *); 108 void bmac_stop(struct bmac_softc *); 109 void bmac_start(struct ifnet *); 110 void bmac_transmit_packet(struct bmac_softc *, void *, int); 111 int bmac_put(struct bmac_softc *, void *, struct mbuf *); 112 struct mbuf *bmac_get(struct bmac_softc *, void *, int); 113 void bmac_watchdog(struct ifnet *); 114 int bmac_ioctl(struct ifnet *, u_long, void *); 115 void bmac_setladrf(struct bmac_softc *); 116 117 int bmac_mii_readreg(struct device *, int, int); 118 void bmac_mii_writereg(struct device *, int, int, int); 119 void bmac_mii_statchg(struct device *); 120 void bmac_mii_tick(void *); 121 u_int32_t bmac_mbo_read(struct device *); 122 void bmac_mbo_write(struct device *, u_int32_t); 123 124 CFATTACH_DECL(bm, sizeof(struct bmac_softc), 125 bmac_match, bmac_attach, NULL, NULL); 126 127 const struct mii_bitbang_ops bmac_mbo = { 128 bmac_mbo_read, bmac_mbo_write, 129 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 130 }; 131 132 static inline uint16_t 133 bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 134 { 135 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 136 } 137 138 static inline void 139 bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 140 { 141 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 142 } 143 144 static inline void 145 bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 146 { 147 val |= bmac_read_reg(sc, off); 148 bmac_write_reg(sc, off, val); 149 } 150 151 static inline void 152 bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 153 { 154 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 155 } 156 157 int 158 bmac_match(struct device *parent, struct cfdata *cf, void *aux) 159 { 160 struct confargs *ca = aux; 161 162 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 163 return 0; 164 165 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 166 return 1; 167 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 168 return 1; 169 170 return 0; 171 } 172 173 void 174 bmac_attach(struct device *parent, struct device *self, void *aux) 175 { 176 struct confargs *ca = aux; 177 struct bmac_softc *sc = (void *)self; 178 struct ifnet *ifp = &sc->sc_if; 179 struct mii_data *mii = &sc->sc_mii; 180 u_char laddr[6]; 181 182 callout_init(&sc->sc_tick_ch, 0); 183 184 sc->sc_flags =0; 185 if (strcmp(ca->ca_name, "ethernet") == 0) { 186 char name[64]; 187 188 memset(name, 0, 64); 189 OF_package_to_path(ca->ca_node, name, sizeof(name)); 190 OF_open(name); 191 sc->sc_flags |= BMAC_BMACPLUS; 192 } 193 194 ca->ca_reg[0] += ca->ca_baseaddr; 195 ca->ca_reg[2] += ca->ca_baseaddr; 196 ca->ca_reg[4] += ca->ca_baseaddr; 197 198 sc->sc_iot = ca->ca_tag; 199 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 200 &sc->sc_ioh) != 0) { 201 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 202 return; 203 } 204 205 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 206 207 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 208 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 209 printf(": cannot get mac-address\n"); 210 return; 211 } 212 memcpy(sc->sc_enaddr, laddr, 6); 213 214 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE); 215 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE); 216 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t)); 217 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 218 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 219 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 220 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 221 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 222 printf("cannot allocate memory\n"); 223 return; 224 } 225 226 printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2], 227 ether_sprintf(laddr)); 228 229 intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc); 230 intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc); 231 232 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 233 ifp->if_softc = sc; 234 ifp->if_ioctl = bmac_ioctl; 235 ifp->if_start = bmac_start; 236 ifp->if_flags = 237 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 238 ifp->if_watchdog = bmac_watchdog; 239 IFQ_SET_READY(&ifp->if_snd); 240 241 mii->mii_ifp = ifp; 242 mii->mii_readreg = bmac_mii_readreg; 243 mii->mii_writereg = bmac_mii_writereg; 244 mii->mii_statchg = bmac_mii_statchg; 245 246 sc->sc_ethercom.ec_mii = mii; 247 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 248 mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, 249 MII_OFFSET_ANY, 0); 250 251 /* Choose a default media. */ 252 if (LIST_FIRST(&mii->mii_phys) == NULL) { 253 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 254 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 255 } else 256 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 257 258 bmac_reset_chip(sc); 259 260 if_attach(ifp); 261 ether_ifattach(ifp, sc->sc_enaddr); 262 } 263 264 /* 265 * Reset and enable bmac by heathrow FCR. 266 */ 267 void 268 bmac_reset_chip(struct bmac_softc *sc) 269 { 270 u_int v; 271 272 dbdma_reset(sc->sc_txdma); 273 dbdma_reset(sc->sc_rxdma); 274 275 v = obio_read_4(HEATHROW_FCR); 276 277 v |= EnetEnable; 278 obio_write_4(HEATHROW_FCR, v); 279 delay(50000); 280 281 v |= ResetEnetCell; 282 obio_write_4(HEATHROW_FCR, v); 283 delay(50000); 284 285 v &= ~ResetEnetCell; 286 obio_write_4(HEATHROW_FCR, v); 287 delay(50000); 288 289 obio_write_4(HEATHROW_FCR, v); 290 } 291 292 void 293 bmac_init(struct bmac_softc *sc) 294 { 295 struct ifnet *ifp = &sc->sc_if; 296 struct ether_header *eh; 297 void *data; 298 int i, tb, bmcr; 299 u_short *p; 300 301 bmac_reset_chip(sc); 302 303 /* XXX */ 304 bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR); 305 bmcr &= ~BMCR_ISO; 306 bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr); 307 308 bmac_write_reg(sc, RXRST, RxResetValue); 309 bmac_write_reg(sc, TXRST, TxResetBit); 310 311 /* Wait for reset completion. */ 312 for (i = 1000; i > 0; i -= 10) { 313 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 314 break; 315 delay(10); 316 } 317 if (i <= 0) 318 printf("%s: reset timeout\n", ifp->if_xname); 319 320 if (! (sc->sc_flags & BMAC_BMACPLUS)) 321 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 322 323 if ((mfpvr() >> 16) == MPC601) 324 tb = mfrtcl(); 325 else 326 tb = mftbl(); 327 bmac_write_reg(sc, RSEED, tb); 328 bmac_set_bits(sc, XIFC, TxOutputEnable); 329 bmac_read_reg(sc, PAREG); 330 331 /* Reset various counters. */ 332 bmac_write_reg(sc, NCCNT, 0); 333 bmac_write_reg(sc, NTCNT, 0); 334 bmac_write_reg(sc, EXCNT, 0); 335 bmac_write_reg(sc, LTCNT, 0); 336 bmac_write_reg(sc, FRCNT, 0); 337 bmac_write_reg(sc, LECNT, 0); 338 bmac_write_reg(sc, AECNT, 0); 339 bmac_write_reg(sc, FECNT, 0); 340 bmac_write_reg(sc, RXCV, 0); 341 342 /* Set tx fifo information. */ 343 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 344 345 bmac_write_reg(sc, TXFIFOCSR, 0); 346 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 347 348 /* Set rx fifo information. */ 349 bmac_write_reg(sc, RXFIFOCSR, 0); 350 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 351 352 /* Clear status register. */ 353 bmac_read_reg(sc, STATUS); 354 355 bmac_write_reg(sc, HASH3, 0); 356 bmac_write_reg(sc, HASH2, 0); 357 bmac_write_reg(sc, HASH1, 0); 358 bmac_write_reg(sc, HASH0, 0); 359 360 /* Set MAC address. */ 361 p = (u_short *)sc->sc_enaddr; 362 bmac_write_reg(sc, MADD0, *p++); 363 bmac_write_reg(sc, MADD1, *p++); 364 bmac_write_reg(sc, MADD2, *p); 365 366 bmac_write_reg(sc, RXCFG, 367 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 368 369 if (ifp->if_flags & IFF_PROMISC) 370 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 371 372 bmac_init_dma(sc); 373 374 /* Enable TX/RX */ 375 bmac_set_bits(sc, RXCFG, RxMACEnable); 376 bmac_set_bits(sc, TXCFG, TxMACEnable); 377 378 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 379 380 ifp->if_flags |= IFF_RUNNING; 381 ifp->if_flags &= ~IFF_OACTIVE; 382 ifp->if_timer = 0; 383 384 data = sc->sc_txbuf; 385 eh = (struct ether_header *)data; 386 387 memset(data, 0, sizeof(eh) + ETHERMIN); 388 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 389 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 390 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 391 392 bmac_start(ifp); 393 394 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 395 } 396 397 void 398 bmac_init_dma(struct bmac_softc *sc) 399 { 400 dbdma_command_t *cmd = sc->sc_rxcmd; 401 int i; 402 403 dbdma_reset(sc->sc_txdma); 404 dbdma_reset(sc->sc_rxdma); 405 406 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 407 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 408 409 for (i = 0; i < BMAC_RXBUFS; i++) { 410 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 411 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 412 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 413 cmd++; 414 } 415 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 416 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 417 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 418 419 sc->sc_rxlast = 0; 420 421 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 422 } 423 424 int 425 bmac_intr(void *v) 426 { 427 struct bmac_softc *sc = v; 428 int stat; 429 430 stat = bmac_read_reg(sc, STATUS); 431 if (stat == 0) 432 return 0; 433 434 #ifdef BMAC_DEBUG 435 printf("bmac_intr status = 0x%x\n", stat); 436 #endif 437 438 if (stat & IntFrameSent) { 439 sc->sc_if.if_flags &= ~IFF_OACTIVE; 440 sc->sc_if.if_timer = 0; 441 sc->sc_if.if_opackets++; 442 bmac_start(&sc->sc_if); 443 } 444 445 /* XXX should do more! */ 446 447 return 1; 448 } 449 450 int 451 bmac_rint(void *v) 452 { 453 struct bmac_softc *sc = v; 454 struct ifnet *ifp = &sc->sc_if; 455 struct mbuf *m; 456 dbdma_command_t *cmd; 457 int status, resid, count, datalen; 458 int i, n; 459 void *data; 460 461 i = sc->sc_rxlast; 462 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 463 if (i == BMAC_RXBUFS) 464 i = 0; 465 cmd = &sc->sc_rxcmd[i]; 466 status = in16rb(&cmd->d_status); 467 resid = in16rb(&cmd->d_resid); 468 469 #ifdef BMAC_DEBUG 470 if (status != 0 && status != 0x8440 && status != 0x9440) 471 printf("bmac_rint status = 0x%x\n", status); 472 #endif 473 474 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 475 continue; 476 count = in16rb(&cmd->d_count); 477 datalen = count - resid - 2; /* 2 == framelen */ 478 if (datalen < sizeof(struct ether_header)) { 479 printf("%s: short packet len = %d\n", 480 ifp->if_xname, datalen); 481 goto next; 482 } 483 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 484 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 485 486 /* XXX Sometimes bmac reads one extra byte. */ 487 if (datalen == ETHER_MAX_LEN + 1) 488 datalen--; 489 490 /* Trim the CRC. */ 491 datalen -= ETHER_CRC_LEN; 492 493 m = bmac_get(sc, data, datalen); 494 if (m == NULL) { 495 ifp->if_ierrors++; 496 goto next; 497 } 498 499 /* 500 * Check if there's a BPF listener on this interface. 501 * If so, hand off the raw packet to BPF. 502 */ 503 bpf_mtap(ifp, m); 504 (*ifp->if_input)(ifp, m); 505 ifp->if_ipackets++; 506 507 next: 508 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 509 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 510 511 cmd->d_status = 0; 512 cmd->d_resid = 0; 513 sc->sc_rxlast = i + 1; 514 } 515 ether_mediachange(ifp); 516 517 dbdma_continue(sc->sc_rxdma); 518 519 return 1; 520 } 521 522 void 523 bmac_reset(struct bmac_softc *sc) 524 { 525 int s; 526 527 s = splnet(); 528 bmac_init(sc); 529 splx(s); 530 } 531 532 void 533 bmac_stop(struct bmac_softc *sc) 534 { 535 struct ifnet *ifp = &sc->sc_if; 536 int s; 537 538 s = splnet(); 539 540 callout_stop(&sc->sc_tick_ch); 541 mii_down(&sc->sc_mii); 542 543 /* Disable TX/RX. */ 544 bmac_reset_bits(sc, TXCFG, TxMACEnable); 545 bmac_reset_bits(sc, RXCFG, RxMACEnable); 546 547 /* Disable all interrupts. */ 548 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 549 550 dbdma_stop(sc->sc_txdma); 551 dbdma_stop(sc->sc_rxdma); 552 553 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 554 ifp->if_timer = 0; 555 556 splx(s); 557 } 558 559 void 560 bmac_start(struct ifnet *ifp) 561 { 562 struct bmac_softc *sc = ifp->if_softc; 563 struct mbuf *m; 564 int tlen; 565 566 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 567 return; 568 569 while (1) { 570 if (ifp->if_flags & IFF_OACTIVE) 571 return; 572 573 IFQ_DEQUEUE(&ifp->if_snd, m); 574 if (m == 0) 575 break; 576 /* 577 * If BPF is listening on this interface, let it see the 578 * packet before we commit it to the wire. 579 */ 580 bpf_mtap(ifp, m); 581 582 ifp->if_flags |= IFF_OACTIVE; 583 tlen = bmac_put(sc, sc->sc_txbuf, m); 584 585 /* 5 seconds to watch for failing to transmit */ 586 ifp->if_timer = 5; 587 ifp->if_opackets++; /* # of pkts */ 588 589 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 590 } 591 } 592 593 void 594 bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 595 { 596 dbdma_command_t *cmd = sc->sc_txcmd; 597 vaddr_t va = (vaddr_t)buff; 598 599 #ifdef BMAC_DEBUG 600 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 601 panic("bmac_transmit_packet"); 602 #endif 603 604 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 605 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 606 cmd++; 607 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 608 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 609 610 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 611 } 612 613 int 614 bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 615 { 616 struct mbuf *n; 617 int len, tlen = 0; 618 619 for (; m; m = n) { 620 len = m->m_len; 621 if (len == 0) { 622 MFREE(m, n); 623 continue; 624 } 625 memcpy(buff, mtod(m, void *), len); 626 buff = (char *)buff + len; 627 tlen += len; 628 MFREE(m, n); 629 } 630 if (tlen > PAGE_SIZE) 631 panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname); 632 633 return tlen; 634 } 635 636 struct mbuf * 637 bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 638 { 639 struct mbuf *m; 640 struct mbuf *top, **mp; 641 int len; 642 643 MGETHDR(m, M_DONTWAIT, MT_DATA); 644 if (m == 0) 645 return 0; 646 m->m_pkthdr.rcvif = &sc->sc_if; 647 m->m_pkthdr.len = totlen; 648 len = MHLEN; 649 top = 0; 650 mp = ⊤ 651 652 while (totlen > 0) { 653 if (top) { 654 MGET(m, M_DONTWAIT, MT_DATA); 655 if (m == 0) { 656 m_freem(top); 657 return 0; 658 } 659 len = MLEN; 660 } 661 if (totlen >= MINCLSIZE) { 662 MCLGET(m, M_DONTWAIT); 663 if ((m->m_flags & M_EXT) == 0) { 664 m_free(m); 665 m_freem(top); 666 return 0; 667 } 668 len = MCLBYTES; 669 } 670 m->m_len = len = min(totlen, len); 671 memcpy(mtod(m, void *), pkt, len); 672 pkt = (char *)pkt + len; 673 totlen -= len; 674 *mp = m; 675 mp = &m->m_next; 676 } 677 678 return top; 679 } 680 681 void 682 bmac_watchdog(struct ifnet *ifp) 683 { 684 struct bmac_softc *sc = ifp->if_softc; 685 686 bmac_reset_bits(sc, RXCFG, RxMACEnable); 687 bmac_reset_bits(sc, TXCFG, TxMACEnable); 688 689 printf("%s: device timeout\n", ifp->if_xname); 690 ifp->if_oerrors++; 691 692 bmac_reset(sc); 693 } 694 695 int 696 bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 697 { 698 struct bmac_softc *sc = ifp->if_softc; 699 struct ifaddr *ifa = (struct ifaddr *)data; 700 int s, error = 0; 701 702 s = splnet(); 703 704 switch (cmd) { 705 706 case SIOCINITIFADDR: 707 ifp->if_flags |= IFF_UP; 708 709 bmac_init(sc); 710 switch (ifa->ifa_addr->sa_family) { 711 #ifdef INET 712 case AF_INET: 713 arp_ifinit(ifp, ifa); 714 break; 715 #endif 716 default: 717 break; 718 } 719 break; 720 721 case SIOCSIFFLAGS: 722 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 723 break; 724 /* XXX see the comment in ed_ioctl() about code re-use */ 725 if ((ifp->if_flags & IFF_UP) == 0 && 726 (ifp->if_flags & IFF_RUNNING) != 0) { 727 /* 728 * If interface is marked down and it is running, then 729 * stop it. 730 */ 731 bmac_stop(sc); 732 ifp->if_flags &= ~IFF_RUNNING; 733 } else if ((ifp->if_flags & IFF_UP) != 0 && 734 (ifp->if_flags & IFF_RUNNING) == 0) { 735 /* 736 * If interface is marked up and it is stopped, then 737 * start it. 738 */ 739 bmac_init(sc); 740 } else { 741 /* 742 * Reset the interface to pick up changes in any other 743 * flags that affect hardware registers. 744 */ 745 /*bmac_stop(sc);*/ 746 bmac_init(sc); 747 } 748 #ifdef BMAC_DEBUG 749 if (ifp->if_flags & IFF_DEBUG) 750 sc->sc_flags |= BMAC_DEBUGFLAG; 751 #endif 752 break; 753 754 case SIOCADDMULTI: 755 case SIOCDELMULTI: 756 case SIOCGIFMEDIA: 757 case SIOCSIFMEDIA: 758 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 759 /* 760 * Multicast list has changed; set the hardware filter 761 * accordingly. 762 */ 763 if (ifp->if_flags & IFF_RUNNING) { 764 bmac_init(sc); 765 bmac_setladrf(sc); 766 } 767 error = 0; 768 } 769 break; 770 default: 771 error = ether_ioctl(ifp, cmd, data); 772 break; 773 } 774 775 splx(s); 776 return error; 777 } 778 779 /* 780 * Set up the logical address filter. 781 */ 782 void 783 bmac_setladrf(struct bmac_softc *sc) 784 { 785 struct ifnet *ifp = &sc->sc_if; 786 struct ether_multi *enm; 787 struct ether_multistep step; 788 u_int32_t crc; 789 u_int16_t hash[4]; 790 int x; 791 792 /* 793 * Set up multicast address filter by passing all multicast addresses 794 * through a crc generator, and then using the high order 6 bits as an 795 * index into the 64 bit logical address filter. The high order bit 796 * selects the word, while the rest of the bits select the bit within 797 * the word. 798 */ 799 800 if (ifp->if_flags & IFF_PROMISC) { 801 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 802 return; 803 } 804 805 if (ifp->if_flags & IFF_ALLMULTI) { 806 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 807 goto chipit; 808 } 809 810 hash[3] = hash[2] = hash[1] = hash[0] = 0; 811 812 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 813 while (enm != NULL) { 814 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 815 /* 816 * We must listen to a range of multicast addresses. 817 * For now, just accept all multicasts, rather than 818 * trying to set only those filter bits needed to match 819 * the range. (At this time, the only use of address 820 * ranges is for IP multicast routing, for which the 821 * range is big enough to require all bits set.) 822 */ 823 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 824 ifp->if_flags |= IFF_ALLMULTI; 825 goto chipit; 826 } 827 828 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 829 830 /* Just want the 6 most significant bits. */ 831 crc >>= 26; 832 833 /* Set the corresponding bit in the filter. */ 834 hash[crc >> 4] |= 1 << (crc & 0xf); 835 836 ETHER_NEXT_MULTI(step, enm); 837 } 838 839 ifp->if_flags &= ~IFF_ALLMULTI; 840 841 chipit: 842 bmac_write_reg(sc, HASH0, hash[0]); 843 bmac_write_reg(sc, HASH1, hash[1]); 844 bmac_write_reg(sc, HASH2, hash[2]); 845 bmac_write_reg(sc, HASH3, hash[3]); 846 x = bmac_read_reg(sc, RXCFG); 847 x &= ~RxPromiscEnable; 848 x |= RxHashFilterEnable; 849 bmac_write_reg(sc, RXCFG, x); 850 } 851 852 int 853 bmac_mii_readreg(struct device *dev, int phy, int reg) 854 { 855 return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg); 856 } 857 858 void 859 bmac_mii_writereg(struct device *dev, int phy, int reg, int val) 860 { 861 mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val); 862 } 863 864 u_int32_t 865 bmac_mbo_read(struct device *dev) 866 { 867 struct bmac_softc *sc = (void *)dev; 868 869 return bmac_read_reg(sc, MIFCSR); 870 } 871 872 void 873 bmac_mbo_write(struct device *dev, u_int32_t val) 874 { 875 struct bmac_softc *sc = (void *)dev; 876 877 bmac_write_reg(sc, MIFCSR, val); 878 } 879 880 void 881 bmac_mii_statchg(struct device *dev) 882 { 883 struct bmac_softc *sc = (void *)dev; 884 int x; 885 886 /* Update duplex mode in TX configuration */ 887 x = bmac_read_reg(sc, TXCFG); 888 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 889 x |= TxFullDuplex; 890 else 891 x &= ~TxFullDuplex; 892 bmac_write_reg(sc, TXCFG, x); 893 894 #ifdef BMAC_DEBUG 895 printf("bmac_mii_statchg 0x%x\n", 896 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 897 #endif 898 } 899 900 void 901 bmac_mii_tick(void *v) 902 { 903 struct bmac_softc *sc = v; 904 int s; 905 906 s = splnet(); 907 mii_tick(&sc->sc_mii); 908 splx(s); 909 910 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 911 } 912