1 /* $NetBSD: ki2cvar.h,v 1.3 2007/12/07 16:01:19 macallan Exp $ */ 2 /* Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp */ 3 4 /*- 5 * Copyright (c) 2001 Tsubai Masanari. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef KI2CVAR_H 31 #define KI2CVAR_H 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/systm.h> 36 37 #include <dev/i2c/i2cvar.h> 38 39 /* Keywest I2C Register offsets */ 40 #define MODE 0 41 #define CONTROL 1 42 #define STATUS 2 43 #define ISR 3 44 #define IER 4 45 #define ADDR 5 46 #define SUBADDR 6 47 #define DATA 7 48 49 /* MODE */ 50 #define I2C_SPEED 0x03 /* Speed mask */ 51 #define I2C_100kHz 0x00 52 #define I2C_50kHz 0x01 53 #define I2C_25kHz 0x02 54 #define I2C_MODE 0x0c /* Mode mask */ 55 #define I2C_DUMBMODE 0x00 /* Dumb mode */ 56 #define I2C_STDMODE 0x04 /* Standard mode */ 57 #define I2C_STDSUBMODE 0x08 /* Standard mode + sub address */ 58 #define I2C_COMBMODE 0x0c /* Combined mode */ 59 #define I2C_PORT 0xf0 /* Port mask */ 60 61 /* CONTROL */ 62 #define I2C_CT_AAK 0x01 /* Send AAK */ 63 #define I2C_CT_ADDR 0x02 /* Send address(es) */ 64 #define I2C_CT_STOP 0x04 /* Send STOP */ 65 #define I2C_CT_START 0x08 /* Send START */ 66 67 /* STATUS */ 68 #define I2C_ST_BUSY 0x01 /* Busy */ 69 #define I2C_ST_LASTAAK 0x02 /* Last AAK */ 70 #define I2C_ST_LASTRW 0x04 /* Last R/W */ 71 #define I2C_ST_SDA 0x08 /* SDA */ 72 #define I2C_ST_SCL 0x10 /* SCL */ 73 74 /* ISR/IER */ 75 #define I2C_INT_DATA 0x01 /* Data byte sent/received */ 76 #define I2C_INT_ADDR 0x02 /* Address sent */ 77 #define I2C_INT_STOP 0x04 /* STOP condition sent */ 78 #define I2C_INT_START 0x08 /* START condition sent */ 79 80 /* I2C flags */ 81 #define I2C_BUSY 0x01 82 #define I2C_READING 0x02 83 #define I2C_ERROR 0x04 84 85 struct ki2c_softc { 86 struct device sc_dev; 87 u_char *sc_reg; 88 int sc_regstep; 89 90 struct i2c_controller sc_i2c; 91 kmutex_t sc_buslock; 92 93 int sc_flags; 94 u_char *sc_data; 95 int sc_resid; 96 }; 97 98 struct ki2c_confargs { 99 char *ka_name; /* device name */ 100 int ka_node; 101 i2c_tag_t ka_tag; /* our controller */ 102 i2c_addr_t ka_addr; /* address of device */ 103 }; 104 105 #endif 106