1 /* $NetBSD: zs.c,v 1.49 2009/10/27 03:45:32 snj Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Bill Studenmund 5 * Copyright (c) 1995 Gordon W. Ross 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Zilog Z8530 Dual UART driver (machine-dependent part) 31 * 32 * Runs two serial lines per chip using slave drivers. 33 * Plain tty/async lines use the zs_async slave. 34 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 35 * Other ports use their own mice & keyboard slaves. 36 * 37 * Credits & history: 38 * 39 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 40 * (port-sun3?) zs.c driver (which was in turn based on code in the 41 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 42 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de 43 * Brouwer field-tested the driver at a local ISP. 44 * 45 * Bill Studenmund and Gordon Ross then ported the machine-independent 46 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 47 * intermediate version (mac68k using a local, patched version of 48 * the m.i. drivers), with NetBSD 1.3 containing a full version. 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.49 2009/10/27 03:45:32 snj Exp $"); 53 54 #include "opt_ddb.h" 55 #include "opt_kgdb.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/proc.h> 60 #include <sys/device.h> 61 #include <sys/conf.h> 62 #include <sys/file.h> 63 #include <sys/ioctl.h> 64 #include <sys/tty.h> 65 #include <sys/time.h> 66 #include <sys/kernel.h> 67 #include <sys/syslog.h> 68 #include <sys/intr.h> 69 #include <sys/cpu.h> 70 #ifdef KGDB 71 #include <sys/kgdb.h> 72 #endif 73 74 #include <dev/cons.h> 75 #include <dev/ofw/openfirm.h> 76 #include <dev/ic/z8530reg.h> 77 78 #include <machine/z8530var.h> 79 #include <machine/autoconf.h> 80 #include <machine/pio.h> 81 82 /* Are these in a header file anywhere? */ 83 /* Booter flags interface */ 84 #define ZSMAC_RAW 0x01 85 #define ZSMAC_LOCALTALK 0x02 86 87 /* 88 * Some warts needed by z8530tty.c - 89 */ 90 int zs_def_cflag = (CREAD | CS8 | HUPCL); 91 92 /* 93 * abort detection on console will now timeout after iterating on a loop 94 * the following # of times. Cheep hack. Also, abort detection is turned 95 * off after a timeout (i.e. maybe there's not a terminal hooked up). 96 */ 97 #define ZSABORT_DELAY 3000000 98 99 struct zsdevice { 100 /* Yes, they are backwards. */ 101 struct zschan zs_chan_b; 102 struct zschan zs_chan_a; 103 }; 104 105 static int zs_defspeed[2] = { 106 38400, /* ttyZ0 */ 107 38400, /* ttyZ1 */ 108 }; 109 110 /* console stuff */ 111 void *zs_conschan = 0; 112 int zs_conschannel = -1; 113 #ifdef ZS_CONSOLE_ABORT 114 int zs_cons_canabort = 1; 115 #else 116 int zs_cons_canabort = 0; 117 #endif /* ZS_CONSOLE_ABORT*/ 118 119 /* device to which the console is attached--if serial. */ 120 /* Mac stuff */ 121 122 static int zs_get_speed(struct zs_chanstate *); 123 124 /* 125 * Even though zsparam will set up the clock multiples, etc., we 126 * still set them here as: 1) mice & keyboards don't use zsparam, 127 * and 2) the console stuff uses these defaults before device 128 * attach. 129 */ 130 131 static uint8_t zs_init_reg[16] = { 132 0, /* 0: CMD (reset, etc.) */ 133 0, /* 1: No interrupts yet. */ 134 0, /* IVECT */ 135 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 136 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 137 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 138 0, /* 6: TXSYNC/SYNCLO */ 139 0, /* 7: RXSYNC/SYNCHI */ 140 0, /* 8: alias for data port */ 141 ZSWR9_MASTER_IE, 142 0, /*10: Misc. TX/RX control bits */ 143 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 144 ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */ 145 0, /*13: BAUDHI (default=38400) */ 146 ZSWR14_BAUD_ENA, 147 ZSWR15_BREAK_IE, 148 }; 149 150 /**************************************************************** 151 * Autoconfig 152 ****************************************************************/ 153 154 /* Definition of the driver for autoconfig. */ 155 static int zsc_match(device_t, cfdata_t, void *); 156 static void zsc_attach(device_t, device_t, void *); 157 static int zsc_print(void *, const char *); 158 159 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc), 160 zsc_match, zsc_attach, NULL, NULL); 161 162 extern struct cfdriver zsc_cd; 163 164 int zsc_attached; 165 166 int zshard(void *); 167 #ifdef ZS_TXDMA 168 static int zs_txdma_int(void *); 169 #endif 170 171 void zscnprobe(struct consdev *); 172 void zscninit(struct consdev *); 173 int zscngetc(dev_t); 174 void zscnputc(dev_t, int); 175 void zscnpollc(dev_t, int); 176 177 /* 178 * Is the zs chip present? 179 */ 180 static int 181 zsc_match(device_t parent, cfdata_t cf, void *aux) 182 { 183 struct confargs *ca = aux; 184 185 if (strcmp(ca->ca_name, "escc") != 0) 186 return 0; 187 188 if (zsc_attached) 189 return 0; 190 191 return 1; 192 } 193 194 /* 195 * Attach a found zs. 196 * 197 * Match slave number to zs unit number, so that misconfiguration will 198 * not set up the keyboard as ttya, etc. 199 */ 200 static void 201 zsc_attach(device_t parent, device_t self, void *aux) 202 { 203 struct zsc_softc *zsc = device_private(self); 204 struct confargs *ca = aux; 205 struct zsc_attach_args zsc_args; 206 volatile struct zschan *zc; 207 struct xzs_chanstate *xcs; 208 struct zs_chanstate *cs; 209 struct zsdevice *zsd; 210 int channel; 211 int s, chip, theflags; 212 int node, intr[2][3]; 213 u_int regs[6]; 214 215 zsc_attached = 1; 216 217 zsc->zsc_dev = self; 218 219 chip = 0; 220 ca->ca_reg[0] += ca->ca_baseaddr; 221 zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]); 222 223 node = OF_child(ca->ca_node); /* ch-a */ 224 225 for (channel = 0; channel < 2; channel++) { 226 if (OF_getprop(node, "AAPL,interrupts", 227 intr[channel], sizeof(intr[0])) == -1 && 228 OF_getprop(node, "interrupts", 229 intr[channel], sizeof(intr[0])) == -1) { 230 aprint_error(": cannot find interrupt property\n"); 231 return; 232 } 233 234 if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) { 235 aprint_error(": cannot find reg property\n"); 236 return; 237 } 238 regs[2] += ca->ca_baseaddr; 239 regs[4] += ca->ca_baseaddr; 240 #ifdef ZS_TXDMA 241 zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]); 242 zsc->zsc_txdmacmd[channel] = 243 dbdma_alloc(sizeof(dbdma_command_t) * 3); 244 memset(zsc->zsc_txdmacmd[channel], 0, 245 sizeof(dbdma_command_t) * 3); 246 dbdma_reset(zsc->zsc_txdmareg[channel]); 247 #endif 248 node = OF_peer(node); /* ch-b */ 249 } 250 251 aprint_normal(" irq %d,%d\n", intr[0][0], intr[1][0]); 252 253 /* 254 * Initialize software state for each channel. 255 */ 256 for (channel = 0; channel < 2; channel++) { 257 zsc_args.channel = channel; 258 zsc_args.hwflags = (channel == zs_conschannel ? 259 ZS_HWFLAG_CONSOLE : 0); 260 xcs = &zsc->xzsc_xcs_store[channel]; 261 cs = &xcs->xzs_cs; 262 zsc->zsc_cs[channel] = cs; 263 264 zs_lock_init(cs); 265 cs->cs_channel = channel; 266 cs->cs_private = NULL; 267 cs->cs_ops = &zsops_null; 268 269 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 270 271 cs->cs_reg_csr = &zc->zc_csr; 272 cs->cs_reg_data = &zc->zc_data; 273 274 memcpy(cs->cs_creg, zs_init_reg, 16); 275 memcpy(cs->cs_preg, zs_init_reg, 16); 276 277 /* Current BAUD rate generator clock. */ 278 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */ 279 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 280 cs->cs_defspeed = zs_get_speed(cs); 281 else 282 cs->cs_defspeed = zs_defspeed[channel]; 283 cs->cs_defcflag = zs_def_cflag; 284 285 /* Make these correspond to cs_defcflag (-crtscts) */ 286 cs->cs_rr0_dcd = ZSRR0_DCD; 287 cs->cs_rr0_cts = 0; 288 cs->cs_wr5_dtr = ZSWR5_DTR; 289 cs->cs_wr5_rts = 0; 290 291 #ifdef __notyet__ 292 cs->cs_slave_type = ZS_SLAVE_NONE; 293 #endif 294 295 /* Define BAUD rate stuff. */ 296 xcs->cs_clocks[0].clk = PCLK; 297 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 298 xcs->cs_clocks[1].flags = 299 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 300 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 301 xcs->cs_clock_count = 3; 302 if (channel == 0) { 303 theflags = 0; /*mac68k_machine.modem_flags;*/ 304 /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/ 305 /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/ 306 xcs->cs_clocks[1].clk = 0; 307 xcs->cs_clocks[2].clk = 0; 308 } else { 309 theflags = 0; /*mac68k_machine.print_flags;*/ 310 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 311 /* 312 * Yes, we aren't defining ANY clock source enables for the 313 * printer's DCD clock in. The hardware won't let us 314 * use it. But a clock will freak out the chip, so we 315 * let you set it, telling us to bar interrupts on the line. 316 */ 317 /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/ 318 /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/ 319 xcs->cs_clocks[1].clk = 0; 320 xcs->cs_clocks[2].clk = 0; 321 } 322 if (xcs->cs_clocks[1].clk) 323 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 324 if (xcs->cs_clocks[2].clk) 325 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 326 327 /* Set defaults in our "extended" chanstate. */ 328 xcs->cs_csource = 0; 329 xcs->cs_psource = 0; 330 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 331 xcs->cs_pclk_flag = 0; 332 333 if (theflags & ZSMAC_RAW) { 334 zsc_args.hwflags |= ZS_HWFLAG_RAW; 335 printf(" (raw defaults)"); 336 } 337 338 /* 339 * XXX - This might be better done with a "stub" driver 340 * (to replace zstty) that ignores LocalTalk for now. 341 */ 342 if (theflags & ZSMAC_LOCALTALK) { 343 printf(" shielding from LocalTalk"); 344 cs->cs_defspeed = 1; 345 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff; 346 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff; 347 zs_write_reg(cs, ZSRR_BAUDLO, 0xff); 348 zs_write_reg(cs, ZSRR_BAUDHI, 0xff); 349 /* 350 * If we might have LocalTalk, then make sure we have the 351 * Baud rate low-enough to not do any damage. 352 */ 353 } 354 355 /* 356 * We used to disable chip interrupts here, but we now 357 * do that in zscnprobe, just in case MacOS left the chip on. 358 */ 359 360 xcs->cs_chip = chip; 361 362 /* Stash away a copy of the final H/W flags. */ 363 xcs->cs_hwflags = zsc_args.hwflags; 364 365 /* 366 * Look for a child driver for this channel. 367 * The child attach will setup the hardware. 368 */ 369 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 370 /* No sub-driver. Just reset it. */ 371 uint8_t reset = (channel == 0) ? 372 ZSWR9_A_RESET : ZSWR9_B_RESET; 373 s = splzs(); 374 zs_write_reg(cs, 9, reset); 375 splx(s); 376 } 377 } 378 379 /* XXX - Now safe to install interrupt handlers. */ 380 intr_establish(intr[0][0], IST_EDGE, IPL_TTY, zshard, zsc); 381 intr_establish(intr[1][0], IST_EDGE, IPL_TTY, zshard, zsc); 382 #ifdef ZS_TXDMA 383 intr_establish(intr[0][1], IST_EDGE, IPL_TTY, zs_txdma_int, (void *)0); 384 intr_establish(intr[1][1], IST_EDGE, IPL_TTY, zs_txdma_int, (void *)1); 385 #endif 386 387 zsc->zsc_si = softint_establish(SOFTINT_SERIAL, 388 (void (*)(void *)) zsc_intr_soft, zsc); 389 390 /* 391 * Set the master interrupt enable and interrupt vector. 392 * (common to both channels, do it on A) 393 */ 394 cs = zsc->zsc_cs[0]; 395 s = splzs(); 396 /* interrupt vector */ 397 zs_write_reg(cs, 2, zs_init_reg[2]); 398 /* master interrupt control (enable) */ 399 zs_write_reg(cs, 9, zs_init_reg[9]); 400 splx(s); 401 } 402 403 static int 404 zsc_print(void *aux, const char *name) 405 { 406 struct zsc_attach_args *args = aux; 407 408 if (name != NULL) 409 aprint_normal("%s: ", name); 410 411 if (args->channel != -1) 412 aprint_normal(" channel %d", args->channel); 413 414 return UNCONF; 415 } 416 417 int 418 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data) 419 { 420 switch (cmd) { 421 default: 422 return (EPASSTHROUGH); 423 } 424 return (0); 425 } 426 427 void 428 zsmd_setclock(struct zs_chanstate *cs) 429 { 430 #ifdef NOTYET 431 struct xzs_chanstate *xcs = (void *)cs; 432 433 if (cs->cs_channel != 0) 434 return; 435 436 /* 437 * If the new clock has the external bit set, then select the 438 * external source. 439 */ 440 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 441 #endif 442 } 443 444 int 445 zshard(void *arg) 446 { 447 struct zsc_softc *zsc; 448 int rval; 449 450 zsc = arg; 451 rval = zsc_intr_hard(zsc); 452 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) 453 softint_schedule(zsc->zsc_si); 454 455 return rval; 456 } 457 458 #ifdef ZS_TXDMA 459 int 460 zs_txdma_int(void *arg) 461 { 462 int ch = (int)arg; 463 struct zsc_softc *zsc; 464 struct zs_chanstate *cs; 465 466 zsc = device_lookup_private(&zsc_cd, ch); 467 if (zsc == NULL) 468 panic("zs_txdma_int"); 469 470 cs = zsc->zsc_cs[ch]; 471 zstty_txdma_int(cs); 472 473 if (cs->cs_softreq) 474 softint_schedule(zsc->zsc_si); 475 476 return 1; 477 } 478 479 void 480 zs_dma_setup(struct zs_chanstate *cs, void *pa, int len) 481 { 482 struct zsc_softc *zsc; 483 dbdma_command_t *cmdp; 484 int ch = cs->cs_channel; 485 486 zsc = device_lookup_private(&zsc_cd, ch); 487 cmdp = zsc->zsc_txdmacmd[ch]; 488 489 DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa), 490 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 491 cmdp++; 492 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 493 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 494 495 __asm volatile("eieio"); 496 497 dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]); 498 } 499 #endif 500 501 /* 502 * Compute the current baud rate given a ZS channel. 503 * XXX Assume internal BRG. 504 */ 505 int 506 zs_get_speed(struct zs_chanstate *cs) 507 { 508 int tconst; 509 510 tconst = zs_read_reg(cs, 12); 511 tconst |= zs_read_reg(cs, 13) << 8; 512 return TCONST_TO_BPS(cs->cs_brg_clk, tconst); 513 } 514 515 #ifndef ZS_TOLERANCE 516 #define ZS_TOLERANCE 51 517 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 518 #endif 519 520 /* 521 * Search through the signal sources in the channel, and 522 * pick the best one for the baud rate requested. Return 523 * a -1 if not achievable in tolerance. Otherwise return 0 524 * and fill in the values. 525 * 526 * This routine draws inspiration from the Atari port's zs.c 527 * driver in NetBSD 1.1 which did the same type of source switching. 528 * Tolerance code inspired by comspeed routine in isa/com.c. 529 * 530 * By Bill Studenmund, 1996-05-12 531 */ 532 int 533 zs_set_speed(struct zs_chanstate *cs, int bps) 534 { 535 struct xzs_chanstate *xcs = (void *) cs; 536 int i, tc, tc0 = 0, tc1, s, sf = 0; 537 int src, rate0, rate1, err, tol; 538 539 if (bps == 0) 540 return (0); 541 542 src = -1; /* no valid source yet */ 543 tol = ZS_TOLERANCE; 544 545 /* 546 * Step through all the sources and see which one matches 547 * the best. A source has to match BETTER than tol to be chosen. 548 * Thus if two sources give the same error, the first one will be 549 * chosen. Also, allow for the possability that one source might run 550 * both the BRG and the direct divider (i.e. RTxC). 551 */ 552 for (i = 0; i < xcs->cs_clock_count; i++) { 553 if (xcs->cs_clocks[i].clk <= 0) 554 continue; /* skip non-existent or bad clocks */ 555 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 556 /* check out BRG at /16 */ 557 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 558 if (tc1 >= 0) { 559 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 560 err = abs(((rate1 - bps)*1000)/bps); 561 if (err < tol) { 562 tol = err; 563 src = i; 564 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 565 tc0 = tc1; 566 rate0 = rate1; 567 } 568 } 569 } 570 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 571 /* 572 * Check out either /1, /16, /32, or /64 573 * Note: for /1, you'd better be using a synchronized 574 * clock! 575 */ 576 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 577 int b1 = b0 >> 4, e1 = abs(b1-bps); 578 int b2 = b1 >> 1, e2 = abs(b2-bps); 579 int b3 = b2 >> 1, e3 = abs(b3-bps); 580 581 if (e0 < e1 && e0 < e2 && e0 < e3) { 582 err = e0; 583 rate1 = b0; 584 tc1 = ZSWR4_CLK_X1; 585 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 586 err = e1; 587 rate1 = b1; 588 tc1 = ZSWR4_CLK_X16; 589 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 590 err = e2; 591 rate1 = b2; 592 tc1 = ZSWR4_CLK_X32; 593 } else { 594 err = e3; 595 rate1 = b3; 596 tc1 = ZSWR4_CLK_X64; 597 } 598 599 err = (err * 1000)/bps; 600 if (err < tol) { 601 tol = err; 602 src = i; 603 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 604 tc0 = tc1; 605 rate0 = rate1; 606 } 607 } 608 } 609 #ifdef ZSMACDEBUG 610 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src); 611 #endif 612 if (src == -1) 613 return (EINVAL); /* no can do */ 614 615 /* 616 * The M.I. layer likes to keep cs_brg_clk current, even though 617 * we are the only ones who should be touching the BRG's rate. 618 * 619 * Note: we are assuming that any ZSC_EXTERN signal source comes in 620 * on the RTxC pin. Correct for the mac68k obio zsc. 621 */ 622 if (sf & ZSC_EXTERN) 623 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 624 else 625 cs->cs_brg_clk = PCLK / 16; 626 627 /* 628 * Now we have a source, so set it up. 629 */ 630 s = splzs(); 631 xcs->cs_psource = src; 632 xcs->cs_pclk_flag = sf; 633 bps = rate0; 634 if (sf & ZSC_BRG) { 635 cs->cs_preg[4] = ZSWR4_CLK_X16; 636 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 637 if (sf & ZSC_PCLK) { 638 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 639 } else { 640 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 641 } 642 tc = tc0; 643 } else { 644 cs->cs_preg[4] = tc0; 645 if (sf & ZSC_RTXDIV) { 646 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 647 } else { 648 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 649 } 650 cs->cs_preg[14]= 0; 651 tc = 0xffff; 652 } 653 /* Set the BAUD rate divisor. */ 654 cs->cs_preg[12] = tc; 655 cs->cs_preg[13] = tc >> 8; 656 splx(s); 657 658 #ifdef ZSMACDEBUG 659 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 660 bps, tc, src, sf); 661 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 662 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 663 #endif 664 665 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 666 667 /* Caller will stuff the pending registers. */ 668 return (0); 669 } 670 671 int 672 zs_set_modes(struct zs_chanstate *cs, int cflag) 673 { 674 struct xzs_chanstate *xcs = (void*)cs; 675 int s; 676 677 /* 678 * Make sure we don't enable hfc on a signal line we're ignoring. 679 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 680 * this code also effectivly turns off ZSWR15_CTS_IE. 681 * 682 * Also, disable DCD interrupts if we've been told to ignore 683 * the DCD pin. Happens on mac68k because the input line for 684 * DCD can also be used as a clock input. (Just set CLOCAL.) 685 * 686 * If someone tries to turn an invalid flow mode on, Just Say No 687 * (Suggested by gwr) 688 */ 689 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF))) 690 return (EINVAL); 691 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 692 if (cflag & MDMBUF) 693 return (EINVAL); 694 cflag |= CLOCAL; 695 } 696 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS))) 697 return (EINVAL); 698 699 /* 700 * Output hardware flow control on the chip is horrendous: 701 * if carrier detect drops, the receiver is disabled, and if 702 * CTS drops, the transmitter is stoped IN MID CHARACTER! 703 * Therefore, NEVER set the HFC bit, and instead use the 704 * status interrupt to detect CTS changes. 705 */ 706 s = splzs(); 707 if ((cflag & (CLOCAL | MDMBUF)) != 0) 708 cs->cs_rr0_dcd = 0; 709 else 710 cs->cs_rr0_dcd = ZSRR0_DCD; 711 /* 712 * The mac hardware only has one output, DTR (HSKo in Mac 713 * parlance). In HFC mode, we use it for the functions 714 * typically served by RTS and DTR on other ports, so we 715 * have to fake the upper layer out some. 716 * 717 * CRTSCTS we use CTS as an input which tells us when to shut up. 718 * We make no effort to shut up the other side of the connection. 719 * DTR is used to hang up the modem. 720 * 721 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 722 * shut up the other side. 723 */ 724 if ((cflag & CRTSCTS) != 0) { 725 cs->cs_wr5_dtr = ZSWR5_DTR; 726 cs->cs_wr5_rts = 0; 727 cs->cs_rr0_cts = ZSRR0_CTS; 728 } else if ((cflag & CDTRCTS) != 0) { 729 cs->cs_wr5_dtr = 0; 730 cs->cs_wr5_rts = ZSWR5_DTR; 731 cs->cs_rr0_cts = ZSRR0_CTS; 732 } else if ((cflag & MDMBUF) != 0) { 733 cs->cs_wr5_dtr = 0; 734 cs->cs_wr5_rts = ZSWR5_DTR; 735 cs->cs_rr0_cts = ZSRR0_DCD; 736 } else { 737 cs->cs_wr5_dtr = ZSWR5_DTR; 738 cs->cs_wr5_rts = 0; 739 cs->cs_rr0_cts = 0; 740 } 741 splx(s); 742 743 /* Caller will stuff the pending registers. */ 744 return (0); 745 } 746 747 748 /* 749 * Read or write the chip with suitable delays. 750 * MacII hardware has the delay built in. 751 * No need for extra delay. :-) However, some clock-chirped 752 * macs, or zsc's on serial add-on boards might need it. 753 */ 754 #define ZS_DELAY() 755 756 uint8_t 757 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 758 { 759 uint8_t val; 760 761 out8(cs->cs_reg_csr, reg); 762 ZS_DELAY(); 763 val = in8(cs->cs_reg_csr); 764 ZS_DELAY(); 765 return val; 766 } 767 768 void 769 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 770 { 771 out8(cs->cs_reg_csr, reg); 772 ZS_DELAY(); 773 out8(cs->cs_reg_csr, val); 774 ZS_DELAY(); 775 } 776 777 uint8_t 778 zs_read_csr(struct zs_chanstate *cs) 779 { 780 uint8_t val; 781 782 val = in8(cs->cs_reg_csr); 783 ZS_DELAY(); 784 /* make up for the fact CTS is wired backwards */ 785 val ^= ZSRR0_CTS; 786 return val; 787 } 788 789 void 790 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 791 { 792 /* Note, the csr does not write CTS... */ 793 out8(cs->cs_reg_csr, val); 794 ZS_DELAY(); 795 } 796 797 uint8_t 798 zs_read_data(struct zs_chanstate *cs) 799 { 800 uint8_t val; 801 802 val = in8(cs->cs_reg_data); 803 ZS_DELAY(); 804 return val; 805 } 806 807 void 808 zs_write_data(struct zs_chanstate *cs, uint8_t val) 809 { 810 out8(cs->cs_reg_data, val); 811 ZS_DELAY(); 812 } 813 814 /**************************************************************** 815 * Console support functions (powermac specific!) 816 * Note: this code is allowed to know about the layout of 817 * the chip registers, and uses that to keep things simple. 818 * XXX - I think I like the mvme167 code better. -gwr 819 * XXX - Well :-P :-) -wrs 820 ****************************************************************/ 821 822 #define zscnpollc nullcnpollc 823 cons_decl(zs); 824 825 static int stdin, stdout; 826 827 /* 828 * Console functions. 829 */ 830 831 /* 832 * zscnprobe is the routine which gets called as the kernel is trying to 833 * figure out where the console should be. Each io driver which might 834 * be the console (as defined in mac68k/conf.c) gets probed. The probe 835 * fills in the consdev structure. Important parts are the device #, 836 * and the console priority. Values are CN_DEAD (don't touch me), 837 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL 838 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!) 839 * 840 * As the mac's a bit different, we do extra work here. We mainly check 841 * to see if we have serial echo going on. Also chould check for default 842 * speeds. 843 */ 844 845 /* 846 * Polled input char. 847 */ 848 int 849 zs_getc(void *v) 850 { 851 volatile struct zschan *zc = v; 852 int s, c, rr0; 853 854 s = splhigh(); 855 /* Wait for a character to arrive. */ 856 do { 857 rr0 = in8(&zc->zc_csr); 858 ZS_DELAY(); 859 } while ((rr0 & ZSRR0_RX_READY) == 0); 860 861 c = in8(&zc->zc_data); 862 ZS_DELAY(); 863 splx(s); 864 865 /* 866 * This is used by the kd driver to read scan codes, 867 * so don't translate '\r' ==> '\n' here... 868 */ 869 return (c); 870 } 871 872 /* 873 * Polled output char. 874 */ 875 void 876 zs_putc(void *v, int c) 877 { 878 volatile struct zschan *zc = v; 879 int s, rr0; 880 long wait = 0; 881 882 s = splhigh(); 883 /* Wait for transmitter to become ready. */ 884 do { 885 rr0 = in8(&zc->zc_csr); 886 ZS_DELAY(); 887 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 888 889 if ((rr0 & ZSRR0_TX_READY) != 0) { 890 out8(&zc->zc_data, c); 891 ZS_DELAY(); 892 } 893 splx(s); 894 } 895 896 897 /* 898 * Polled console input putchar. 899 */ 900 int 901 zscngetc(dev_t dev) 902 { 903 volatile struct zschan *zc = zs_conschan; 904 int c; 905 906 if (zc) { 907 c = zs_getc(__UNVOLATILE(zc)); 908 } else { 909 char ch = 0; 910 OF_read(stdin, &ch, 1); 911 c = ch; 912 } 913 return c; 914 } 915 916 /* 917 * Polled console output putchar. 918 */ 919 void 920 zscnputc(dev_t dev, int c) 921 { 922 volatile struct zschan *zc = zs_conschan; 923 924 if (zc) { 925 zs_putc(__UNVOLATILE(zc), c); 926 } else { 927 char ch = c; 928 OF_write(stdout, &ch, 1); 929 } 930 } 931 932 /* 933 * Handle user request to enter kernel debugger. 934 */ 935 void 936 zs_abort(struct zs_chanstate *cs) 937 { 938 volatile struct zschan *zc = zs_conschan; 939 int rr0; 940 long wait = 0; 941 942 if (zs_cons_canabort == 0) 943 return; 944 945 /* Wait for end of break to avoid PROM abort. */ 946 do { 947 rr0 = in8(&zc->zc_csr); 948 ZS_DELAY(); 949 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY)); 950 951 if (wait > ZSABORT_DELAY) { 952 zs_cons_canabort = 0; 953 /* If we time out, turn off the abort ability! */ 954 } 955 956 #if defined(KGDB) 957 kgdb_connect(1); 958 #elif defined(DDB) 959 Debugger(); 960 #endif 961 } 962 963 extern int ofccngetc(dev_t); 964 extern void ofccnputc(dev_t, int); 965 966 struct consdev consdev_zs = { 967 zscnprobe, 968 zscninit, 969 zscngetc, 970 zscnputc, 971 zscnpollc, 972 }; 973 974 void 975 zscnprobe(struct consdev *cp) 976 { 977 int chosen, pkg; 978 char name[16]; 979 980 if ((chosen = OF_finddevice("/chosen")) == -1) 981 return; 982 983 if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1) 984 return; 985 if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1) 986 return; 987 988 if ((pkg = OF_instance_to_package(stdin)) == -1) 989 return; 990 991 memset(name, 0, sizeof(name)); 992 if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1) 993 return; 994 995 if (strcmp(name, "serial") != 0) 996 return; 997 998 memset(name, 0, sizeof(name)); 999 if (OF_getprop(pkg, "name", name, sizeof(name)) == -1) 1000 return; 1001 1002 cp->cn_pri = CN_REMOTE; 1003 } 1004 1005 void 1006 zscninit(struct consdev *cp) 1007 { 1008 int escc, escc_ch, obio, zs_offset; 1009 u_int32_t reg[5]; 1010 char name[16]; 1011 1012 if ((escc_ch = OF_instance_to_package(stdin)) == -1) 1013 return; 1014 1015 memset(name, 0, sizeof(name)); 1016 if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1) 1017 return; 1018 1019 zs_conschannel = strcmp(name, "ch-b") == 0; 1020 1021 if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4) 1022 return; 1023 zs_offset = reg[0]; 1024 1025 escc = OF_parent(escc_ch); 1026 obio = OF_parent(escc); 1027 1028 if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12) 1029 return; 1030 zs_conschan = (void *)(reg[2] + zs_offset); 1031 } 1032