xref: /netbsd/sys/arch/macppc/include/intr.h (revision c4a72b64)
1 /*	$NetBSD: intr.h,v 1.15 2002/07/28 07:07:46 chs Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _MACPPC_INTR_H_
40 #define _MACPPC_INTR_H_
41 
42 /* Interrupt priority `levels'. */
43 #define	IPL_NONE	9	/* nothing */
44 #define	IPL_SOFTCLOCK	8	/* timeouts */
45 #define	IPL_SOFTNET	7	/* protocol stacks */
46 #define	IPL_BIO		6	/* block I/O */
47 #define	IPL_NET		5	/* network */
48 #define	IPL_SOFTSERIAL	4	/* serial */
49 #define	IPL_TTY		3	/* terminal */
50 #define	IPL_IMP		3	/* memory allocation */
51 #define	IPL_AUDIO	2	/* audio */
52 #define	IPL_CLOCK	1	/* clock */
53 #define	IPL_HIGH	1	/* everything */
54 #define	IPL_SERIAL	0	/* serial */
55 #define	NIPL		10
56 
57 /* Interrupt sharing types. */
58 #define	IST_NONE	0	/* none */
59 #define	IST_PULSE	1	/* pulsed */
60 #define	IST_EDGE	2	/* edge-triggered */
61 #define	IST_LEVEL	3	/* level-triggered */
62 
63 #ifndef _LOCORE
64 
65 /*
66  * Interrupt handler chains.  intr_establish() inserts a handler into
67  * the list.  The handler is called with its (single) argument.
68  */
69 struct intrhand {
70 	int	(*ih_fun) __P((void *));
71 	void	*ih_arg;
72 	u_long	ih_count;
73 	struct	intrhand *ih_next;
74 	int	ih_level;
75 	int	ih_irq;
76 };
77 
78 void softnet __P((int));
79 void softserial __P((void));
80 
81 int splraise __P((int));
82 int spllower __P((int));
83 void splx __P((int));
84 void softintr __P((int));
85 
86 extern volatile int astpending, tickspending;
87 extern int imask[];
88 
89 #define ICU_LEN		64
90 
91 /* Soft interrupt masks. */
92 #define SIR_CLOCK	28
93 #define SIR_NET		29
94 #define SIR_SERIAL	30
95 #define SPL_CLOCK	31
96 
97 /*
98  * Hardware interrupt masks
99  */
100 #define splbio()	splraise(imask[IPL_BIO])
101 #define splnet()	splraise(imask[IPL_NET])
102 #define spltty()	splraise(imask[IPL_TTY])
103 #define	splaudio()	splraise(imask[IPL_AUDIO])
104 #define splclock()	splraise(imask[IPL_CLOCK])
105 #define splstatclock()	splclock()
106 #define	splserial()	splraise(imask[IPL_SERIAL])
107 
108 #define spllpt()	spltty()
109 
110 /*
111  * Software interrupt masks
112  *
113  * NOTE: splsoftclock() is used by hardclock() to lower the priority from
114  * clock to softclock before it calls softclock().
115  */
116 #define	spllowersoftclock() spllower(imask[IPL_SOFTCLOCK])
117 #define	splsoftclock()	splraise(imask[IPL_SOFTCLOCK])
118 #define	splsoftnet()	splraise(imask[IPL_SOFTNET])
119 #define	splsoftserial()	splraise(imask[IPL_SOFTSERIAL])
120 
121 /*
122  * Miscellaneous
123  */
124 #define splvm()		splraise(imask[IPL_IMP])
125 #define	splhigh()	splraise(imask[IPL_HIGH])
126 #define	splsched()	splhigh()
127 #define	spllock()	splhigh()
128 #define	spl0()		spllower(0)
129 
130 #define	setsoftclock()	softintr(SIR_CLOCK)
131 #define	setsoftnet()	softintr(SIR_NET)
132 #define	setsoftserial()	softintr(SIR_SERIAL)
133 
134 extern long intrcnt[];
135 
136 #define CNT_IRQ0	0
137 #define CNT_CLOCK	64
138 #define CNT_SOFTCLOCK	65
139 #define CNT_SOFTNET	66
140 #define CNT_SOFTSERIAL	67
141 
142 #ifdef MULTIPROCESSOR
143 #define MACPPC_IPI_HALT		0x0001
144 #define MACPPC_IPI_FLUSH_FPU	0x0002
145 #define MACPPC_IPI_FLUSH_VEC	0x0004
146 
147 struct cpu_info;
148 void macppc_send_ipi(volatile struct cpu_info *, u_long);
149 #endif
150 
151 #endif /* _LOCORE */
152 
153 #endif /* _MACPPC_INTR_H_ */
154