xref: /netbsd/sys/arch/mips/adm5120/dev/uart.h (revision 6550d01e)
1 /* $NetBSD: uart.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
2 
3 /*-
4  * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or
8  * without modification, are permitted provided that the following
9  * conditions are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above
13  *    copyright notice, this list of conditions and the following
14  *    disclaimer in the documentation and/or other materials provided
15  *    with the distribution.
16  * 3. The names of the authors may not be used to endorse or promote
17  *    products derived from this software without specific prior
18  *    written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
27  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
29  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31  * OF SUCH DAMAGE.
32  */
33 #ifndef	_ADMUART_H
34 #define	_ADMUART_H
35 /* UART registers */
36 #define	UART_DR_REG	0x00
37 #define	UART_RSR_REG	0x04
38 #define		UART_RSR_FE			0x01
39 #define		UART_RSR_PE			0x02
40 #define		UART_RSR_BE			0x04
41 #define		UART_RSR_OE			0x08
42 #define	UART_ECR_REG	0x04
43 #define		UART_ECR_RSR			0x80
44 #define	UART_LCR_H_REG	0x08
45 #define	UART_LCR_M_REG	0x0c
46 #define	UART_LCR_L_REG	0x10
47 #define	UART_CR_REG	0x14
48 #define 	UART_CR_PORT_EN			0x01
49 #define 	UART_CR_SIREN			0x02
50 #define 	UART_CR_SIRLP			0x04
51 #define 	UART_CR_MODEM_STATUS_INT_EN	0x08
52 #define 	UART_CR_RX_INT_EN		0x10
53 #define 	UART_CR_TX_INT_EN		0x20
54 #define 	UART_CR_RX_TIMEOUT_INT_EN	0x40
55 #define 	UART_CR_LOOPBACK_EN		0x80
56 #define	UART_FR_REG	0x18
57 #define		UART_FR_CTS		0x01
58 #define		UART_FR_DSR		0x02
59 #define		UART_FR_DCD		0x04
60 #define		UART_FR_BUSY		0x08
61 #define		UART_FR_RX_FIFO_EMPTY	0x10
62 #define		UART_FR_TX_FIFO_FULL	0x20
63 #define		UART_FR_RX_FIFO_FULL	0x40
64 #define		UART_FR_TX_FIFO_EMPTY	0x80
65 #define	UART_IR_REG	0x1c
66 #define		UART_IR_MODEM_STATUS_INT	0x01
67 #define		UART_IR_RX_INT			0x02
68 #define		UART_IR_TX_INT			0x04
69 #define		UART_IR_RX_TIMEOUT_INT		0x08
70 #define		UART_IR_INT_MASK		0x0f
71 #define	UART_ILPR_REG	0x20
72 
73 /* UART interrupts */
74 
75 int	uart_cnattach(void);
76 #endif	/* _ADMUART_H */
77