1 /* $NetBSD: bonitoreg.h,v 1.6 2005/12/24 20:07:19 perry Exp $ */ 2 3 /* 4 * Bonito Register Map 5 * Copyright (c) 1999 Algorithmics Ltd 6 * 7 * Algorithmics gives permission for anyone to use and modify this file 8 * without any obligation or license condition except that you retain 9 * this copyright message in any source redistribution in whole or part. 10 * 11 * Updated copies of this and other files can be found at 12 * ftp://ftp.algor.co.uk/pub/bonito/ 13 * 14 * Users of the Bonito controller are warmly recommended to contribute 15 * any useful changes back to Algorithmics (mail to 16 * bonito@algor.co.uk). 17 */ 18 19 /* Revision 1.48 autogenerated on 08/17/99 15:20:01 */ 20 21 #ifndef _BONITO_H_ 22 23 #define BONITO(x) (BONITO_REG_BASE + (x)) 24 25 #define REGVAL(x) *((volatile u_int32_t *) MIPS_PHYS_TO_KSEG1(x)) 26 27 #define BONITO_BOOT_BASE 0x1fc00000 28 #define BONITO_BOOT_SIZE 0x00100000 29 #define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) 30 #define BONITO_FLASH_BASE 0x1c000000 31 #define BONITO_FLASH_SIZE 0x03000000 32 #define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) 33 #define BONITO_SOCKET_BASE 0x1f800000 34 #define BONITO_SOCKET_SIZE 0x00400000 35 #define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) 36 #define BONITO_REG_BASE 0x1fe00000 37 #define BONITO_REG_SIZE 0x00040000 38 #define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) 39 #define BONITO_DEV_BASE 0x1ff00000 40 #define BONITO_DEV_SIZE 0x00100000 41 #define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) 42 #define BONITO_PCILO_BASE 0x10000000 43 #define BONITO_PCILO_SIZE 0x0c000000 44 #define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) 45 #define BONITO_PCILO0_BASE 0x10000000 46 #define BONITO_PCILO1_BASE 0x14000000 47 #define BONITO_PCILO2_BASE 0x18000000 48 #define BONITO_PCIHI_BASE 0x20000000 49 #define BONITO_PCIHI_SIZE 0x20000000 50 #define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) 51 #define BONITO_PCIIO_BASE 0x1fd00000 52 #define BONITO_PCIIO_SIZE 0x00100000 53 #define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) 54 #define BONITO_PCICFG_BASE 0x1fe80000 55 #define BONITO_PCICFG_SIZE 0x00080000 56 #define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) 57 58 59 /* Bonito Register Bases */ 60 61 #define BONITO_PCICONFIGBASE 0x00 62 #define BONITO_REGBASE 0x100 63 64 65 /* PCI Configuration Registers */ 66 67 #define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) 68 #define BONITO_PCIDID BONITO_PCI_REG(0x00) 69 #define BONITO_PCICMD BONITO_PCI_REG(0x04) 70 #define BONITO_PCICLASS BONITO_PCI_REG(0x08) 71 #define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) 72 #define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) 73 #define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) 74 #define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) 75 #define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) 76 #define BONITO_PCIINT BONITO_PCI_REG(0x3c) 77 78 #define BONITO_PCICMD_PERR_CLR 0x80000000 79 #define BONITO_PCICMD_SERR_CLR 0x40000000 80 #define BONITO_PCICMD_MABORT_CLR 0x20000000 81 #define BONITO_PCICMD_MTABORT_CLR 0x10000000 82 #define BONITO_PCICMD_TABORT_CLR 0x08000000 83 #define BONITO_PCICMD_MPERR_CLR 0x01000000 84 #define BONITO_PCICMD_PERRRESPEN 0x00000040 85 #define BONITO_PCICMD_ASTEPEN 0x00000080 86 #define BONITO_PCICMD_SERREN 0x00000100 87 #define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 88 #define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 89 90 91 #define BONITO_REV_FPGA(x) ((x) & 0x80) 92 #define BONITO_REV_MAJOR(x) (((x) >> 4) & 0x7) 93 #define BONITO_REV_MINOR(x) ((x) & 0xf) 94 95 96 /* 1. Bonito h/w Configuration */ 97 /* Power on register */ 98 99 #define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) 100 101 #define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 102 #define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 103 #define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 104 #define BONITO_BONPONCFG_CPUBIGEND 0x00004000 105 #define BONITO_BONPONCFG_CPUPARITY 0x00002000 106 #define BONITO_BONPONCFG_BURSTORDER 0x00001000 107 #define BONITO_BONPONCFG_CPUTYPE 0x00000007 108 #define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 109 #define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 110 #define BONITO_BONPONCFG_IS_ARBITER 0x00000010 111 #define BONITO_BONPONCFG_ROMBOOT 0x000000c0 112 #define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 113 114 #define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 115 #define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 116 #define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 117 #define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 118 119 #define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100 120 #define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200 121 #define BONITO_BONPONCFG_ROMCS0FAST 0x00000400 122 #define BONITO_BONPONCFG_ROMCS1FAST 0x00000800 123 #define BONITO_BONPONCFG_CONFIG_DIS 0x00000020 124 125 126 /* Other Bonito configuration */ 127 128 #define BONITO_BONGENCFG_OFFSET 0x4 129 #define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET) 130 131 #define BONITO_BONGENCFG_DEBUGMODE 0x00000001 132 #define BONITO_BONGENCFG_SNOOPEN 0x00000002 133 #define BONITO_BONGENCFG_CPUSELFRESET 0x00000004 134 135 #define BONITO_BONGENCFG_FORCE_IRQA 0x00000008 136 #define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010 137 #define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020 138 #define BONITO_BONGENCFG_BYTESWAP 0x00000040 139 140 #define BONITO_BONGENCFG_UNCACHED 0x00000080 141 #define BONITO_BONGENCFG_PREFETCHEN 0x00000100 142 #define BONITO_BONGENCFG_WBEHINDEN 0x00000200 143 #define BONITO_BONGENCFG_CACHEALG 0x00000c00 144 #define BONITO_BONGENCFG_CACHEALG_SHIFT 10 145 #define BONITO_BONGENCFG_PCIQUEUE 0x00001000 146 #define BONITO_BONGENCFG_CACHESTOP 0x00002000 147 #define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000 148 #define BONITO_BONGENCFG_BUSERREN 0x00008000 149 #define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000 150 #define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000 151 152 /* 2. IO & IDE configuration */ 153 154 #define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08) 155 156 /* 3. IO & IDE configuration */ 157 158 #define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c) 159 160 /* 4. PCI address map control */ 161 162 #define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) 163 #define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14) 164 #define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18) 165 166 /* 5. ICU & GPIO regs */ 167 168 /* GPIO Regs - r/w */ 169 170 #define BONITO_GPIODATA_OFFSET 0x1c 171 #define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET) 172 #define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20) 173 174 /* ICU Configuration Regs - r/w */ 175 176 #define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24) 177 #define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28) 178 #define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c) 179 180 /* ICU Enable Regs - IntEn & IntISR are r/o. */ 181 182 #define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30) 183 #define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34) 184 #define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38) 185 #define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c) 186 187 /* PCI mail boxes */ 188 189 #define BONITO_PCIMAIL0_OFFSET 0x40 190 #define BONITO_PCIMAIL1_OFFSET 0x44 191 #define BONITO_PCIMAIL2_OFFSET 0x48 192 #define BONITO_PCIMAIL3_OFFSET 0x4c 193 #define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40) 194 #define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44) 195 #define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48) 196 #define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c) 197 198 199 /* 6. PCI cache */ 200 201 #define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50) 202 #define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54) 203 204 #define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58) 205 #define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c) 206 207 208 /* 209 #define BONITO_PCIRDPOST BONITO(BONITO_REGBASE + 0x60) 210 #define BONITO_PCIDATA BONITO(BONITO_REGBASE + 0x64) 211 */ 212 213 /* 7. IDE DMA & Copier */ 214 215 #define BONITO_CONFIGBASE 0x000 216 #define BONITO_BONITOBASE 0x100 217 #define BONITO_LDMABASE 0x200 218 #define BONITO_COPBASE 0x300 219 #define BONITO_REG_BLOCKMASK 0x300 220 221 #define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0) 222 #define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0) 223 #define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4) 224 #define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8) 225 #define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc) 226 227 #define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0) 228 #define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0) 229 #define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4) 230 #define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8) 231 #define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc) 232 233 234 /* ###### Bit Definitions for individual Registers #### */ 235 236 /* Gen DMA. */ 237 238 #define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc 239 #define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2 240 #define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc 241 #define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2 242 #define BONITO_IDECOPGO_DMA_SIZE 0x0000fffe 243 #define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0 244 #define BONITO_IDECOPGO_DMA_WRITE 0x00010000 245 #define BONITO_IDECOPGO_DMAWCOUNT 0x000f0000 246 #define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16 247 248 #define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000 249 #define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000 250 251 /* DRAM - sdCfg */ 252 253 #define BONITO_SDCFG_AROWBITS 0x00000003 254 #define BONITO_SDCFG_AROWBITS_SHIFT 0 255 #define BONITO_SDCFG_ACOLBITS 0x0000000c 256 #define BONITO_SDCFG_ACOLBITS_SHIFT 2 257 #define BONITO_SDCFG_ABANKBIT 0x00000010 258 #define BONITO_SDCFG_ASIDES 0x00000020 259 #define BONITO_SDCFG_AABSENT 0x00000040 260 #define BONITO_SDCFG_AWIDTH64 0x00000080 261 262 #define BONITO_SDCFG_BROWBITS 0x00000300 263 #define BONITO_SDCFG_BROWBITS_SHIFT 8 264 #define BONITO_SDCFG_BCOLBITS 0x00000c00 265 #define BONITO_SDCFG_BCOLBITS_SHIFT 10 266 #define BONITO_SDCFG_BBANKBIT 0x00001000 267 #define BONITO_SDCFG_BSIDES 0x00002000 268 #define BONITO_SDCFG_BABSENT 0x00004000 269 #define BONITO_SDCFG_BWIDTH64 0x00008000 270 271 #define BONITO_SDCFG_EXTRDDATA 0x00010000 272 #define BONITO_SDCFG_EXTRASCAS 0x00020000 273 #define BONITO_SDCFG_EXTPRECH 0x00040000 274 #define BONITO_SDCFG_EXTRASWIDTH 0x00180000 275 #define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19 276 #define BONITO_SDCFG_DRAMMODESET 0x00200000 277 #define BONITO_SDCFG_DRAMEXTREGS 0x00400000 278 #define BONITO_SDCFG_DRAMPARITY 0x00800000 279 #define BONITO_SDCFG_DRAMBURSTLEN 0x03000000 280 #define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24 281 #define BONITO_SDCFG_DRAMMODESET_DONE 0x80000000 282 283 #define BONITO_SDCFG_DRAMRFSHMULT 0xfc000000 284 #define BONITO_SDCFG_DRAMRFSHMULT_SHIFT 26 285 286 /* PCI Cache - pciCacheCtrl */ 287 288 #define BONITO_PCICACHECTRL_CACHECMD 0x00000007 289 #define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0 290 #define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018 291 #define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3 292 #define BONITO_PCICACHECTRL_CMDEXEC 0x00000020 293 294 #define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001 295 #define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002 296 #define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004 297 298 #define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008 299 #define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010 300 #define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020 301 302 #define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040 303 #define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080 304 #define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100 305 306 #define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200 307 #define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400 308 #define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800 309 310 #define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000 311 #define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000 312 #define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000 313 #define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000 314 #define BONITO_IODEVCFG_DMAON_IDE 0x001f0000 315 #define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16 316 #define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000 317 #define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21 318 #define BONITO_IODEVCFG_EPROMSPLIT 0x02000000 319 #define BONITO_IODEVCFG_CPUCLOCKPERIOD 0xfc000000 320 #define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26 321 322 /* gpio */ 323 #define BONITO_GPIO_GPIOW 0x000003ff 324 #define BONITO_GPIO_GPIOW_SHIFT 0 325 #define BONITO_GPIO_GPIOR 0x01ff0000 326 #define BONITO_GPIO_GPIOR_SHIFT 16 327 #define BONITO_GPIO_GPINR 0xfe000000 328 #define BONITO_GPIO_GPINR_SHIFT 25 329 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) 330 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) 331 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) 332 333 /* ICU */ 334 #define BONITO_ICU_MBOXES 0x0000000f 335 #define BONITO_ICU_MBOXES_SHIFT 0 336 #define BONITO_ICU_DMARDY 0x00000010 337 #define BONITO_ICU_DMAEMPTY 0x00000020 338 #define BONITO_ICU_COPYRDY 0x00000040 339 #define BONITO_ICU_COPYEMPTY 0x00000080 340 #define BONITO_ICU_COPYERR 0x00000100 341 #define BONITO_ICU_PCIIRQ 0x00000200 342 #define BONITO_ICU_MASTERERR 0x00000400 343 #define BONITO_ICU_SYSTEMERR 0x00000800 344 #define BONITO_ICU_DRAMPERR 0x00001000 345 #define BONITO_ICU_RETRYERR 0x00002000 346 #define BONITO_ICU_GPIOS 0x01ff0000 347 #define BONITO_ICU_GPIOS_SHIFT 16 348 #define BONITO_ICU_GPINS 0x7e000000 349 #define BONITO_ICU_GPINS_SHIFT 25 350 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) 351 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) 352 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) 353 354 /* pcimap */ 355 356 #define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f 357 #define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0 358 #define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0 359 #define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6 360 #define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 361 #define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 362 #define BONITO_PCIMAP_PCIMAP_2 0x00040000 363 #define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 364 365 #define BONITO_PCIMAP_WINSIZE (1<<26) 366 #define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) 367 #define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) 368 369 /* pcimembaseCfg */ 370 371 #define BONITO_PCIMEMBASECFG_MASK 0xf0000000 372 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f 373 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 374 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 375 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 376 #define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 377 #define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 378 379 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 380 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 381 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 382 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 383 #define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 384 #define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 385 386 #define BONITO_PCIMEMBASECFG_ASHIFT 23 387 #define BONITO_PCIMEMBASECFG_AMASK 0x007fffff 388 #define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) 389 #define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) 390 391 #define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) 392 393 #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 394 #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 395 #define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 396 397 #define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \ 398 (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \ 399 (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \ 400 ) 401 /* PCIMAP Cfg */ 402 403 #define BONITO_PCIMAPCFG_TYPE1 0x00010000 404 405 /* PCICmd */ 406 407 #define BONITO_PCICMD_MEMEN 0x00000002 408 #define BONITO_PCICMD_MSTREN 0x00000004 409 410 411 #define BONITO_TIMERCFG BONITO(BONITO_REGBASE + 0x60) 412 #endif /* _BONITO_H_ */ 413