1 /* $NetBSD: bonitoreg.h,v 1.4 2002/01/09 02:35:29 thorpej Exp $ */ 2 3 /* 4 * Bonito Register Map 5 * Copyright (c) 1999 Algorithmics Ltd 6 * 7 * Algorithmics gives permission for anyone to use and modify this file 8 * without any obligation or license condition except that you retain 9 * this copyright message in any source redistribution in whole or part. 10 * 11 * Updated copies of this and other files can be found at 12 * ftp://ftp.algor.co.uk/pub/bonito/ 13 * 14 * Users of the Bonito controller are warmly recommended to contribute 15 * any useful changes back to Algorithmics (mail to 16 * bonito@algor.co.uk). 17 */ 18 19 /* Revision 1.40 autogenerated on 08/14/99 17:37:43 */ 20 21 #ifndef _BONITO_H_ 22 23 #define BONITO(x) (BONITO_REG_BASE + (x)) 24 25 #define REGVAL(x) *((__volatile u_int32_t *) MIPS_PHYS_TO_KSEG1(x)) 26 27 #define BONITO_BOOT_BASE 0x1fc00000 28 #define BONITO_BOOT_SIZE 0x00100000 29 #define BONITO_BOOT_TOP (BOOT_BASE+BOOT_SIZE-1) 30 #define BONITO_FLASH_BASE 0x1c000000 31 #define BONITO_FLASH_SIZE 0x03000000 32 #define BONITO_FLASH_TOP (FLASH_BASE+FLASH_SIZE-1) 33 #define BONITO_SOCKET_BASE 0x1f800000 34 #define BONITO_SOCKET_SIZE 0x00400000 35 #define BONITO_SOCKET_TOP (SOCKET_BASE+SOCKET_SIZE-1) 36 #define BONITO_REG_BASE 0x1fe00000 37 #define BONITO_REG_SIZE 0x00040000 38 #define BONITO_REG_TOP (REG_BASE+REG_SIZE-1) 39 #define BONITO_DEV_BASE 0x1ff00000 40 #define BONITO_DEV_SIZE 0x00100000 41 #define BONITO_DEV_TOP (DEV_BASE+DEV_SIZE-1) 42 #define BONITO_PCILO_BASE 0x10000000 43 #define BONITO_PCILO_SIZE 0x0c000000 44 #define BONITO_PCILO_TOP (PCILO_BASE+PCILO_SIZE-1) 45 #define BONITO_PCIHI_BASE 0x20000000 46 #define BONITO_PCIHI_SIZE 0x20000000 47 #define BONITO_PCIHI_TOP (PCIHI_BASE+PCIHI_SIZE-1) 48 #define BONITO_PCIIO_BASE 0x1fd00000 49 #define BONITO_PCIIO_SIZE 0x00100000 50 #define BONITO_PCIIO_TOP (PCIIO_BASE+PCIIO_SIZE-1) 51 #define BONITO_PCICFG_BASE 0x1fe80000 52 #define BONITO_PCICFG_SIZE 0x00080000 53 #define BONITO_PCICFG_TOP (PCICFG_BASE+PCICFG_SIZE-1) 54 55 56 /* Bonito Register Bases */ 57 58 #define BONITO_PCICONFIGBASE 0x00 59 #define BONITO_REGBASE 0x100 60 61 62 /* PCI Configuration Registers */ 63 64 #define BONITO_PCIDID BONITO(BONITO_PCICONFIGBASE + 0x00) 65 #define BONITO_PCICMD BONITO(BONITO_PCICONFIGBASE + 0x04) 66 #define BONITO_PCICLASS BONITO(BONITO_PCICONFIGBASE + 0x08) 67 #define BONITO_PCILTIMER BONITO(BONITO_PCICONFIGBASE + 0x0c) 68 #define BONITO_PCIBASE0 BONITO(BONITO_PCICONFIGBASE + 0x10) 69 #define BONITO_PCIBASE1 BONITO(BONITO_PCICONFIGBASE + 0x14) 70 #define BONITO_PCIBASE2 BONITO(BONITO_PCICONFIGBASE + 0x18) 71 #define BONITO_PCIEXPRBASE BONITO(BONITO_PCICONFIGBASE + 0x30) 72 #define BONITO_PCIINT BONITO(BONITO_PCICONFIGBASE + 0x3c) 73 74 #define BONITO_PCICMD_PERR_CLR 0x80000000 75 #define BONITO_PCICMD_SERR_CLR 0x40000000 76 #define BONITO_PCICMD_MABORT_CLR 0x20000000 77 #define BONITO_PCICMD_MTABORT_CLR 0x10000000 78 #define BONITO_PCICMD_TABORT_CLR 0x08000000 79 #define BONITO_PCICMD_MPERR_CLR 0x01000000 80 #define BONITO_PCICMD_PERRRESPEN 0x00000040 81 #define BONITO_PCICMD_ASTEPEN 0x00000080 82 #define BONITO_PCICMD_SERREN 0x00000100 83 #define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 84 #define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 85 86 87 #define BONITO_REV_FPGA(x) ((x) & 0x80) 88 #define BONITO_REV_MAJOR(x) (((x) >> 4) & 0x7) 89 #define BONITO_REV_MINOR(x) ((x) & 0xf) 90 91 92 /* 1. Bonito h/w Configuration */ 93 /* Power on register */ 94 95 #define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) 96 97 #define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 98 #define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 99 #define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 100 #define BONITO_BONPONCFG_CPUBIGEND 0x00004000 101 #define BONITO_BONPONCFG_CPUPARITY 0x00002000 102 #define BONITO_BONPONCFG_CPUTYPE 0x00000007 103 #define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 104 #define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 105 #define BONITO_BONPONCFG_IS_ARBITER 0x00000010 106 #define BONITO_BONPONCFG_ROMBOOT 0x000000c0 107 #define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 108 109 #define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 110 #define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 111 #define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 112 #define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT) 113 114 #define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100 115 #define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200 116 #define BONITO_BONPONCFG_ROMCS0FAST 0x00000400 117 #define BONITO_BONPONCFG_ROMCS1FAST 0x00000800 118 #define BONITO_BONPONCFG_CONFIG_DIS 0x00000020 119 120 121 /* Other Bonito configuration */ 122 123 #define BONITO_BONGENCFG BONITO(BONITO_REGBASE + 0x04) 124 125 #define BONITO_BONGENCFG_DEBUGMODE 0x00000001 126 #define BONITO_BONGENCFG_SNOOPEN 0x00000002 127 #define BONITO_BONGENCFG_CPUSELFRESET 0x00000004 128 129 #define BONITO_BONGENCFG_FORCE_IRQA 0x00000008 130 #define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010 131 #define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020 132 #define BONITO_BONGENCFG_BYTESWAP 0x00000040 133 134 #define BONITO_BONGENCFG_UNCACHED 0x00000080 135 #define BONITO_BONGENCFG_PREFETCHEN 0x00000100 136 #define BONITO_BONGENCFG_WBEHINDEN 0x00000200 137 #define BONITO_BONGENCFG_CACHEALG 0x00000c00 138 #define BONITO_BONGENCFG_CACHEALG_SHIFT 10 139 #define BONITO_BONGENCFG_PCIQUEUE 0x00001000 140 #define BONITO_BONGENCFG_CACHESTOP 0x00002000 141 #define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000 142 #define BONITO_BONGENCFG_NOTIMEOUT 0x00008000 143 #define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000 144 145 /* 2. IO & IDE configuration */ 146 147 #define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08) 148 149 /* 3. IO & IDE configuration */ 150 151 #define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c) 152 153 /* 4. PCI address map control */ 154 155 #define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) 156 #define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14) 157 #define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18) 158 159 /* 5. ICU & GPIO regs */ 160 161 /* GPIO Regs - r/w */ 162 163 #define BONITO_GPIODATA BONITO(BONITO_REGBASE + 0x1c) 164 #define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20) 165 166 /* ICU Configuration Regs - r/w */ 167 168 #define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24) 169 #define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28) 170 #define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c) 171 172 /* ICU Enable Regs - IntEn & IntISR are r/o. */ 173 174 #define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30) 175 #define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34) 176 #define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38) 177 #define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c) 178 179 /* PCI mail boxes */ 180 181 #define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40) 182 #define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44) 183 #define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48) 184 #define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c) 185 186 187 /* 6. PCI cache */ 188 189 #define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50) 190 #define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54) 191 192 #define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58) 193 #define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c) 194 195 196 /* 197 #define BONITO_PCIRDPOST BONITO(BONITO_REGBASE + 0x60) 198 #define BONITO_PCIDATA BONITO(BONITO_REGBASE + 0x64) 199 */ 200 201 /* 7. IDE DMA & Copier */ 202 203 #define BONITO_CONFIGBASE 0x000 204 #define BONITO_BONITOBASE 0x100 205 #define BONITO_LDMABASE 0x200 206 #define BONITO_COPBASE 0x300 207 #define BONITO_REG_BLOCKMASK 0x300 208 209 #define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0) 210 #define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0) 211 #define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4) 212 #define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8) 213 #define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc) 214 215 #define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0) 216 #define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0) 217 #define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4) 218 #define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8) 219 #define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc) 220 221 222 /* ###### Bit Definitions for individual Registers #### */ 223 224 /* Gen DMA. */ 225 226 #define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc 227 #define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2 228 #define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc 229 #define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2 230 #define BONITO_IDECOPGO_DMA_SIZE 0x0000ffff 231 #define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0 232 #define BONITO_IDECOPGO_DMA_WRITE 0x00010000 233 234 #define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000 235 #define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000 236 237 /* DRAM - sdCfg */ 238 239 #define BONITO_SDCFG_AROWBITS 0x00000003 240 #define BONITO_SDCFG_AROWBITS_SHIFT 0 241 #define BONITO_SDCFG_ACOLBITS 0x0000000c 242 #define BONITO_SDCFG_ACOLBITS_SHIFT 2 243 #define BONITO_SDCFG_ABANKBIT 0x00000010 244 #define BONITO_SDCFG_ASIDES 0x00000020 245 #define BONITO_SDCFG_AABSENT 0x00000040 246 #define BONITO_SDCFG_AWIDTH64 0x00000080 247 248 #define BONITO_SDCFG_BROWBITS 0x00000300 249 #define BONITO_SDCFG_BROWBITS_SHIFT 8 250 #define BONITO_SDCFG_BCOLBITS 0x00000c00 251 #define BONITO_SDCFG_BCOLBITS_SHIFT 10 252 #define BONITO_SDCFG_BBANKBIT 0x00001000 253 #define BONITO_SDCFG_BSIDES 0x00002000 254 #define BONITO_SDCFG_BABSENT 0x00004000 255 #define BONITO_SDCFG_BWIDTH64 0x00008000 256 257 #define BONITO_SDCFG_EXTRDDATA 0x00010000 258 #define BONITO_SDCFG_EXTRASCAS 0x00020000 259 #define BONITO_SDCFG_EXTPRECH 0x00040000 260 #define BONITO_SDCFG_EXTRASWIDTH 0x00180000 261 #define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19 262 #define BONITO_SDCFG_DRAMRESET 0x00200000 263 #define BONITO_SDCFG_DRAMEXTREGS 0x00400000 264 #define BONITO_SDCFG_DRAMCSFLIP 0x00800000 265 266 /* PCI Cache - pciCacheCtrl */ 267 268 #define BONITO_PCICACHECTRL_CACHECMD 0x00000007 269 #define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0 270 #define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018 271 #define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3 272 #define BONITO_PCICACHECTRL_CMDEXEC 0x00000020 273 274 #define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001 275 #define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002 276 #define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004 277 278 #define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008 279 #define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010 280 #define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020 281 282 #define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040 283 #define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080 284 #define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100 285 286 #define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200 287 #define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400 288 #define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800 289 290 #define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000 291 #define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000 292 #define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000 293 #define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000 294 #define BONITO_IODEVCFG_DMAON_IDE 0x001f0000 295 #define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16 296 #define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000 297 #define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21 298 299 /* gpio */ 300 #define BONITO_GPIO_GPIOW 0x000003ff 301 #define BONITO_GPIO_GPIOW_SHIFT 0 302 #define BONITO_GPIO_GPIOR 0x01ff0000 303 #define BONITO_GPIO_GPIOR_SHIFT 16 304 #define BONITO_GPIO_GPINR 0xfe000000 305 #define BONITO_GPIO_GPINR_SHIFT 25 306 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) 307 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) 308 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) 309 310 /* ICU */ 311 #define BONITO_ICU_MBOXES 0x0000000f 312 #define BONITO_ICU_MBOXES_SHIFT 0 313 #define BONITO_ICU_DMARDY 0x00000010 314 #define BONITO_ICU_DMAEMPTY 0x00000020 315 #define BONITO_ICU_COPYRDY 0x00000040 316 #define BONITO_ICU_COPYEMPTY 0x00000080 317 #define BONITO_ICU_COPYERR 0x00000100 318 #define BONITO_ICU_PCIIRQ 0x00000200 319 #define BONITO_ICU_MASTERERR 0x00000400 320 #define BONITO_ICU_SYSTEMERR 0x00000800 321 #define BONITO_ICU_DRAMPERR 0x00001000 322 #define BONITO_ICU_RETRYERR 0x00002000 323 #define BONITO_ICU_GPIOS 0x01ff0000 324 #define BONITO_ICU_GPIOS_SHIFT 16 325 #define BONITO_ICU_GPINS 0x7e000000 326 #define BONITO_ICU_GPINS_SHIFT 25 327 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) 328 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) 329 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) 330 331 /* pcimap */ 332 333 #define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f 334 #define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0 335 #define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0 336 #define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6 337 #define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 338 #define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 339 #define BONITO_PCIMAP_PCIMAP_2 0x00040000 340 #define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << (WIN)*6) 341 342 /* pcimembaseCfg */ 343 344 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f 345 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 346 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 347 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 348 #define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 349 #define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 350 351 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 352 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 353 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 354 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 355 #define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 356 #define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 357 358 #define BONITO_PCIMEMBASECFG_ASHIFT 23 359 #define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) 360 #define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) 361 362 /* PCIMAP Cfg */ 363 364 #define BONITO_PCIMAPCFG_TYPE1 0x00010000 365 366 /* PCICmd */ 367 368 #define BONITO_PCICMD_MEMEN 0x00000002 369 #define BONITO_PCICMD_MSTREN 0x00000004 370 371 372 #endif /* _BONITO_H_ */ 373