1### 2### SBMIPS DEVICES 3### 4 5# System Control/Debug 6device sbscd {[offset = -1], [intr[2] = {-1,-1}]} 7attach sbscd at zbbus 8file arch/mips/sibyte/dev/sbscd.c sbscd 9 10# On-board I/O (slow I/O bridge) 11device sbobio {[offset = -1], [intr[2] = {-1,-1}]} 12attach sbobio at zbbus 13file arch/mips/sibyte/dev/sbobio.c sbobio 14 15# Generic bus, hang off of sbobio 16device sbgbus {[chipsel = -1], [offset = 0], [intr[2] = {-1,-1}]} 17attach sbgbus at sbobio 18file arch/mips/sibyte/dev/sbgbus.c sbgbus 19 20# I/O Bridge Zero attachment to ZBbus 21device sbbrz: pcibus 22attach sbbrz at zbbus 23file arch/mips/sibyte/pci/sbbrz.c sbbrz 24file arch/mips/sibyte/pci/sbbrz_pci.c sbbrz 25 26# Instantiated SB-1250 PCI Host bridge 27device sbpcihb 28attach sbpcihb at pci 29file arch/mips/sibyte/pci/sbpcihb.c sbpcihb 30 31# SB-1250 LDT Host bridge (acts like ppb) 32device sbldthb: pcibus 33attach sbldthb at pci 34file arch/mips/sibyte/pci/sbldthb.c sbldthb 35 36# sbscd children 37 38device sbtimer 39attach sbtimer at sbscd 40file arch/mips/sibyte/dev/sbtimer.c sbtimer 41 42device sbwdog: sysmon_wdog 43attach sbwdog at sbscd 44file arch/mips/sibyte/dev/sbwdog.c sbwdog 45 46# sbobio children 47 48# SB1250 MAC (XXX: maybe add mii_bitbang?) 49device sbmac: arp, ether, ifnet, mii, mii_bitbang 50attach sbmac at sbobio 51file arch/mips/sibyte/dev/sbmac.c sbmac 52 53# SB1250 built-in (asynchronous) serial ports 54device sbscn: tty 55attach sbscn at sbobio 56file arch/mips/sibyte/dev/sbscn.c sbscn needs-flag 57 58# XXX XXX 59# need to think about SMBus more, just hack something together 60# temporariliy so we can use the RTC. 61 62# SB1250 SMBus 63device smbus {[chan = -1], [dev = -1]} 64attach smbus at sbobio 65file arch/mips/sibyte/dev/sbsmbus.c smbus 66 67# XXX XXX 68# XXX also, this should be in sbmips/conf/files.sbmips 69# Bogus RTC attachment 70device xirtc 71attach xirtc at smbus 72 73device strtc 74attach strtc at smbus 75 76file arch/sbmips/sbmips/rtc.c xirtc | strtc 77