1/* $NetBSD: mips_mcclock_loop.S,v 1.4 2009/12/14 00:46:06 matt Exp $ */ 2 3/* 4 * Copyright (c) 2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Simon Burge. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <mips/asm.h> 33#include <mips/cpuregs.h> 34 35 .set noreorder 36 37/* 38 * Provide assembly versions of the clock timing calculation loops that 39 * aren't effected by changes in compiler optimisation. 40 * 41 * These two functions are not profiled! 42 */ 43 44 45LEAF_NOPROFILE(mips_mcclock_loop_with_clock) 46 PTR_SUBU sp, CALLFRAME_SIZ 47 REG_S s0, CALLFRAME_S0(sp) 48 REG_S ra, CALLFRAME_RA(sp) 49 j 2f 50 move s0, zero # iters = 0; 511: 52 .set push 53 .set mips32 54 ssnop # asm ("ssnop;ssnop;ssnop;ssnop"); 55 ssnop 56 ssnop 57 ssnop 58 .set pop 59 60 addu s0, 1 # iters++; 612: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read(); 62 nop 63 and v0, a0 # v0 &= clockmask; 64 beqz v0, 1b # if zero then repeat 65 move v0, s0 # return iters 66 REG_L ra, CALLFRAME_RA(sp) 67 REG_S s0, CALLFRAME_S0(sp) 68 j ra 69 PTR_ADDU sp, CALLFRAME_SIZ 70END(mips_mcclock_loop_with_clock) 71 72LEAF_NOPROFILE(mips_mcclock_loop_without_clock) 73 PTR_SUBU sp, CALLFRAME_SIZ 74 REG_S s0, CALLFRAME_S0(sp) 75 REG_S ra, CALLFRAME_RA(sp) 76 j 2f 77 move s0, zero # iters = 0; 781: 79 .set push 80 .set mips32 81 ssnop # asm ("ssnop;ssnop"); 82 ssnop 83 .set pop 84 85 addu s0, 1 # iters++; 862: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read(); 87 nop 88 and v0, a0 # v0 &= clockmask; 89 beqz v0, 1b # if zero then repeat 90 move v0, s0 # return iters 91 REG_L ra, CALLFRAME_RA(sp) 92 REG_L s0, CALLFRAME_S0(sp) 93 j ra 94 PTR_ADDU sp, CALLFRAME_SIZ 95END(mips_mcclock_loop_without_clock) 96