xref: /netbsd/sys/arch/mips/mips/sys_machdep.c (revision bf9ec67e)
1 /*	$NetBSD: sys_machdep.c,v 1.22 2001/11/14 18:15:26 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Ralph Campbell.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the University of
21  *	California, Berkeley and its contributors.
22  * 4. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	@(#)sys_machdep.c	8.1 (Berkeley) 6/10/93
39  */
40 
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/ioctl.h>
44 #include <sys/file.h>
45 #include <sys/time.h>
46 #include <sys/proc.h>
47 #include <sys/uio.h>
48 #include <sys/kernel.h>
49 #include <sys/buf.h>
50 #include <sys/mount.h>
51 #include <sys/syscallargs.h>
52 
53 #include <mips/cache.h>
54 #include <mips/sysarch.h>
55 #include <mips/cachectl.h>
56 #include <mips/locore.h>
57 
58 #include <uvm/uvm_extern.h>
59 
60 int
61 sys_sysarch(p, v, retval)
62 	struct proc *p;
63 	void *v;
64 	register_t *retval;
65 {
66 	struct sys_sysarch_args /* {
67 		syscallarg(int) op;
68 		syscallarg(void *) parms;
69 	} */ *uap = v;
70 
71 	int error = 0;
72 
73 	switch(SCARG(uap, op)) {
74 	case MIPS_CACHEFLUSH: {
75 		struct mips_cacheflush_args cfua;
76 
77 		error = copyin(SCARG(uap, parms), &cfua, sizeof(cfua));
78 		if (error != 0) return (error);
79 		error =  mips_user_cacheflush(p, cfua.va, cfua.nbytes,
80 		     cfua.whichcache);
81 		break;
82 	}
83 	case MIPS_CACHECTL: {
84 		struct mips_cachectl_args ccua;
85 
86 		error = copyin(SCARG(uap, parms), &ccua, sizeof(ccua));
87 		if (error != 0) return (error);
88 		error = mips_user_cachectl(p, ccua.va, ccua.nbytes, ccua.ctl);
89 		break;
90 	}
91 	default:
92 		error = ENOSYS;
93 		break;
94 	}
95 	return (error);
96 }
97 
98 
99 /*
100  * Handle a request to flush a given user virtual address
101  * range from the i-cache, d-cache, or both.
102  */
103 int
104 mips_user_cacheflush(p, va, nbytes, whichcache)
105 	struct proc *p;
106 	vaddr_t va;
107 	int nbytes, whichcache;
108 {
109 
110 	/* validate the cache we're going to flush. */
111 	switch (whichcache) {
112 	    case ICACHE:
113 	    case DCACHE:
114 	    case BCACHE:
115 		break;
116 	    default:
117 		return (EINVAL);
118 	}
119 
120 #ifndef notyet
121 	/* For now, just flush all of both caches. */
122 	mips_icache_sync_all();
123 	mips_dcache_wbinv_all();
124 	return (0);
125 
126 #else
127 	void * uncached_physaddr;
128 	u_int len;
129 
130 	/*
131 	 * Invalidate each page in the virtual-address range,
132 	 * by manually mapping to a physical address and
133 	 * invalidating the PA.
134 	 */
135 	for (base = (void*) addr; nbytes > 0; base += len, nbytes -= len) {
136 		/* XXX vm_fault?  */
137 		if (whichcache & ICACHE) {
138 			MachFlushCache(uncached_physaddr, len);
139 		}
140 		if (whichcache & DCACHE) {
141 			MachFlushDCache(uncached_physaddr, len);
142 		}
143 	}
144 #endif
145 }
146 
147 /*
148  * Handle a request to make a given user virtual address range
149  * non-cacheable.
150  */
151 int
152 mips_user_cachectl(p, va, nbytes, cachectl)
153 	struct proc *p;
154 	vaddr_t va;
155 	int nbytes, cachectl;
156 {
157 	/* validate the cache we're going to flush. */
158 	switch (cachectl) {
159 	case CACHEABLE:
160 	case UNCACHEABLE:
161 		break;
162 	default:
163 		return (EINVAL);
164 	}
165 
166 #ifndef notyet
167 	return(EOPNOTSUPP);
168 #else
169 	/*
170 	 * Use the merged mips3 pmap cache-control functions to change
171 	 * the cache attributes of each page in the virtual-address range,
172 	 * by manually mapping to a physical address and changing the
173 	 * pmap attributes of the PA of each page in the range.
174 	 * Force misses on non-present pages to be sure the cacheable bits
175 	 * get set.
176 	 */
177 #endif
178 }
179