xref: /netbsd/sys/arch/mips/sibyte/dev/sbtimer.c (revision bf9ec67e)
1 /* $NetBSD: sbtimer.c,v 1.3 2002/03/06 07:47:57 simonb Exp $ */
2 
3 /*
4  * Copyright 2000, 2001
5  * Broadcom Corporation. All rights reserved.
6  *
7  * This software is furnished under license and may be used and copied only
8  * in accordance with the following terms and conditions.  Subject to these
9  * conditions, you may download, copy, install, use, modify and distribute
10  * modified or unmodified copies of this software in source and/or binary
11  * form. No title or ownership is transferred hereby.
12  *
13  * 1) Any source code used, modified or distributed must reproduce and
14  *    retain this copyright notice and list of conditions as they appear in
15  *    the source file.
16  *
17  * 2) No right is granted to use any trade name, trademark, or logo of
18  *    Broadcom Corporation. Neither the "Broadcom Corporation" name nor any
19  *    trademark or logo of Broadcom Corporation may be used to endorse or
20  *    promote products derived from this software without the prior written
21  *    permission of Broadcom Corporation.
22  *
23  * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
24  *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
25  *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
26  *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
27  *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
28  *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #include <sys/param.h>
37 #include <sys/device.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 
41 #include <mips/locore.h>
42 
43 #include <mips/sibyte/include/sb1250_regs.h>
44 #include <mips/sibyte/include/sb1250_scd.h>
45 #include <mips/sibyte/dev/sbscdvar.h>
46 
47 struct sbtimer_softc {
48 	struct device sc_dev;
49 	void	*sc_intrhand;
50 	int	sc_flags;
51 	void	*sc_addr_icnt, *sc_addr_cnt, *sc_addr_cfg;
52 };
53 #define	SBTIMER_CLOCK		1
54 #define	SBTIMER_STATCLOCK	2
55 
56 #define	READ_REG(rp)		(mips3_ld((uint64_t *)(rp)))
57 #define	WRITE_REG(rp, val)	(mips3_sd((uint64_t *)(rp), (val)))
58 
59 static int	sbtimer_match(struct device *, struct cfdata *, void *);
60 static void	sbtimer_attach(struct device *, struct device *, void *);
61 
62 struct cfattach sbtimer_ca = {
63 	sizeof(struct sbtimer_softc), sbtimer_match, sbtimer_attach
64 };
65 
66 static void	sbtimer_clockintr(void *arg, uint32_t status, uint32_t pc);
67 static void	sbtimer_statclockintr(void *arg, uint32_t status,
68 		    uint32_t pc);
69 static void	sbtimer_miscintr(void *arg, uint32_t status, uint32_t pc);
70 
71 static void	sbtimer_clock_init(void *arg);
72 
73 int printticks = 0;
74 
75 static int
76 sbtimer_match(struct device *parent, struct cfdata *match, void *aux)
77 {
78 	struct sbscd_attach_args *sap = aux;
79 
80 	if (sap->sa_locs.sa_type != SBSCD_DEVTYPE_TIMER)
81 		return (0);
82 
83 	return 1;
84 }
85 
86 static void
87 sbtimer_attach(struct device *parent, struct device *self, void *aux)
88 {
89 	struct sbscd_attach_args *sa = aux;
90 	struct sbtimer_softc *sc = (struct sbtimer_softc *)self;
91 	void (*fun)(void *, uint32_t, uint32_t);
92 	int ipl;
93 	const char *comment = "";
94 
95 	sc->sc_flags = sc->sc_dev.dv_cfdata->cf_flags;
96 	sc->sc_addr_icnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base +
97 	    sa->sa_locs.sa_offset + R_SCD_TIMER_INIT);
98 	sc->sc_addr_cnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base +
99 	    sa->sa_locs.sa_offset + R_SCD_TIMER_CNT);
100 	sc->sc_addr_cfg = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base +
101 	    sa->sa_locs.sa_offset + R_SCD_TIMER_CFG);
102 
103 	printf(": ");
104 	if ((sc->sc_flags & SBTIMER_CLOCK) != 0) {
105 		ipl = IPL_CLOCK;
106 		fun = sbtimer_clockintr;
107 
108 		if (system_set_clockfns(sc, sbtimer_clock_init)) {
109 			/* not really the clock */
110 			sc->sc_flags &= ~SBTIMER_CLOCK;
111 			comment = " (not system timer)";
112 			goto not_really;
113 		}
114 		printf("system timer");
115 	} else if ((sc->sc_flags & SBTIMER_STATCLOCK) != 0) {
116 		ipl = IPL_STATCLOCK;
117 		fun = sbtimer_statclockintr;
118 
119 		/* XXX make sure it's the statclock */
120 		if (1) {
121 			/* not really the statclock */
122 			sc->sc_flags &= ~SBTIMER_STATCLOCK;
123 			comment = " (not system statistics timer)";
124 			goto not_really;
125 		}
126 		printf("system statistics timer");
127 	} else {
128 not_really:
129 		ipl = IPL_BIO;			/* XXX -- pretty low */
130 		fun = sbtimer_miscintr;
131 		printf("general-purpose timer%s", comment);
132 	}
133 	printf("\n");
134 
135 	/* clear intr & disable timer. */
136 	WRITE_REG(sc->sc_addr_cfg, 0x00);		/* XXX */
137 
138 	sc->sc_intrhand = cpu_intr_establish(sa->sa_locs.sa_intr[0], ipl,
139 	    fun, sc);
140 }
141 
142 static void
143 sbtimer_clock_init(void *arg)
144 {
145 	struct sbtimer_softc *sc = arg;
146 
147 	printf("%s: ", sc->sc_dev.dv_xname);
148 	if ((1000000 % hz) == 0)
149 		printf("%dHz system timer\n", hz);
150 	else {
151 		printf("cannot get %dHz clock; using 1000Hz\n", hz);
152 		hz = 1000;
153 		tick = 1000000 / hz;
154 	}
155 
156 	WRITE_REG(sc->sc_addr_cfg, 0x00);		/* XXX */
157 	if (G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG))) == 0) {
158 		printf("%s: PLL_DIV == 0; speeding up clock ticks for simulator\n",
159 		    sc->sc_dev.dv_xname);
160 		WRITE_REG(sc->sc_addr_icnt, (tick/100) - 1); /* XXX */
161 	} else {
162 		WRITE_REG(sc->sc_addr_icnt, tick - 1);	/* XXX */
163 	}
164 	WRITE_REG(sc->sc_addr_cfg, 0x03);		/* XXX */
165 }
166 
167 static void
168 sbtimer_clockintr(void *arg, uint32_t status, uint32_t pc)
169 {
170 	struct sbtimer_softc *sc = arg;
171 	struct clockframe cf;
172 
173 	/* clear interrupt, but leave timer enabled and in repeating mode */
174 	WRITE_REG(sc->sc_addr_cfg, 0x03);		/* XXX */
175 
176 	if (printticks)
177 		printf("+");
178 	cf.pc = pc;
179 	cf.sr = status;
180 
181 	/* reset the CPU count register (used by microtime) */
182 	mips3_cp0_count_write(0);
183 
184 	hardclock(&cf);
185 }
186 
187 static void
188 sbtimer_statclockintr(void *arg, uint32_t status, uint32_t pc)
189 {
190 	struct sbtimer_softc *sc = arg;
191 	struct clockframe cf;
192 
193 	/* clear intr & disable timer, reset initial count, re-enable timer */
194 	WRITE_REG(sc->sc_addr_cfg, 0x00);		/* XXX */
195 	/* XXX more to do */
196 
197 	cf.pc = pc;
198 	cf.sr = status;
199 
200 	statclock(&cf);
201 }
202 
203 static void
204 sbtimer_miscintr(void *arg, uint32_t status, uint32_t pc)
205 {
206 	struct sbtimer_softc *sc = arg;
207 
208 	/* disable timer */
209 	WRITE_REG(sc->sc_addr_cfg, 0x00);		/* XXX */
210 
211 	/* XXX more to do */
212 }
213