1 /* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * Global constants and macros File: sb1250_defs.h 5 * 6 * This file contains macros and definitions used by the other 7 * include files. 8 * 9 * Author: Mitch Lichtenberg (mitch@sibyte.com) 10 * 11 ********************************************************************* 12 * 13 * Copyright 2000,2001 14 * Broadcom Corporation. All rights reserved. 15 * 16 * This software is furnished under license and may be used and 17 * copied only in accordance with the following terms and 18 * conditions. Subject to these conditions, you may download, 19 * copy, install, use, modify and distribute modified or unmodified 20 * copies of this software in source and/or binary form. No title 21 * or ownership is transferred hereby. 22 * 23 * 1) Any source code used, modified or distributed must reproduce 24 * and retain this copyright notice and list of conditions as 25 * they appear in the source file. 26 * 27 * 2) No right is granted to use any trade name, trademark, or 28 * logo of Broadcom Corporation. Neither the "Broadcom 29 * Corporation" name nor any trademark or logo of Broadcom 30 * Corporation may be used to endorse or promote products 31 * derived from this software without the prior written 32 * permission of Broadcom Corporation. 33 * 34 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 36 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 37 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 38 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 39 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 42 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 43 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 44 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 45 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 46 * THE POSSIBILITY OF SUCH DAMAGE. 47 ********************************************************************* */ 48 49 50 /* ********************************************************************* 51 * Naming schemes for constants in these files: 52 * 53 * M_xxx MASK constant (identifies bits in a register). 54 * For multi-bit fields, all bits in the field will 55 * be set. 56 * 57 * K_xxx "Code" constant (value for data in a multi-bit 58 * field). The value is right justified. 59 * 60 * V_xxx "Value" constant. This is the same as the 61 * corresponding "K_xxx" constant, except it is 62 * shifted to the correct position in the register. 63 * 64 * S_xxx SHIFT constant. This is the number of bits that 65 * a field value (code) needs to be shifted 66 * (towards the left) to put the value in the right 67 * position for the register. 68 * 69 * A_xxx ADDRESS constant. This will be a physical 70 * address. Use the MIPS_PHYS_TO_KSEG1 macro to 71 * generate a K1SEG address. 72 * 73 * R_xxx RELATIVE offset constant. This is an offset from 74 * an A_xxx constant (usually the first register in 75 * a group). 76 * 77 * G_xxx(X) GET value. This macro obtains a multi-bit field 78 * from a register, masks it, and shifts it to 79 * the bottom of the register (retrieving a K_xxx 80 * value, for example). 81 * 82 * V_xxx(X) VALUE. This macro computes the value of a 83 * K_xxx constant shifted to the correct position 84 * in the register. 85 ********************************************************************* */ 86 87 88 89 90 #ifndef _SB1250_DEFS_H 91 #define _SB1250_DEFS_H 92 93 /* 94 * Cast to 64-bit number. Presumably the syntax is different in 95 * assembly language. 96 * 97 * Note: you'll need to define uint32_t and uint64_t in your headers. 98 */ 99 100 #if !defined(__ASSEMBLER__) 101 #define _SB_MAKE64(x) ((uint64_t)(x)) 102 #define _SB_MAKE32(x) ((uint32_t)(x)) 103 #else 104 #define _SB_MAKE64(x) (x) 105 #define _SB_MAKE32(x) (x) 106 #endif 107 108 109 /* 110 * Make a mask for 1 bit at position 'n' 111 */ 112 113 #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n)) 114 #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n)) 115 116 /* 117 * Make a mask for 'v' bits at position 'n' 118 */ 119 120 #define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n)) 121 #define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n)) 122 123 /* 124 * Make a value at 'v' at bit position 'n' 125 */ 126 127 #define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n)) 128 #define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n)) 129 130 #define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n)) 131 #define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n)) 132 133 /* 134 * Macros to read/write on-chip registers 135 * XXX should we do the MIPS_PHYS_TO_KSEG1 here? 136 */ 137 138 139 #if !defined(__ASSEMBLER__) 140 #define SBWRITECSR(csr,val) *((volatile uint64_t *) MIPS_PHYS_TO_KSEG1(csr)) = (val) 141 #define SBREADCSR(csr) (*((volatile uint64_t *) MIPS_PHYS_TO_KSEG1(csr))) 142 #endif /* __ASSEMBLER__ */ 143 144 #endif 145