1 /* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * DMA definitions File: sb1250_dma.h 5 * 6 * This module contains constants and macros useful for 7 * programming the SB1250's DMA controllers, both the data mover 8 * and the Ethernet DMA. 9 * 10 * SB1250 specification level: 0.2 11 * 12 * Author: Mitch Lichtenberg (mitch@sibyte.com) 13 * 14 ********************************************************************* 15 * 16 * Copyright 2000,2001 17 * Broadcom Corporation. All rights reserved. 18 * 19 * This software is furnished under license and may be used and 20 * copied only in accordance with the following terms and 21 * conditions. Subject to these conditions, you may download, 22 * copy, install, use, modify and distribute modified or unmodified 23 * copies of this software in source and/or binary form. No title 24 * or ownership is transferred hereby. 25 * 26 * 1) Any source code used, modified or distributed must reproduce 27 * and retain this copyright notice and list of conditions as 28 * they appear in the source file. 29 * 30 * 2) No right is granted to use any trade name, trademark, or 31 * logo of Broadcom Corporation. Neither the "Broadcom 32 * Corporation" name nor any trademark or logo of Broadcom 33 * Corporation may be used to endorse or promote products 34 * derived from this software without the prior written 35 * permission of Broadcom Corporation. 36 * 37 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 38 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 39 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 40 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 41 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 42 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 43 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 45 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 46 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 47 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 48 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 49 * THE POSSIBILITY OF SUCH DAMAGE. 50 ********************************************************************* */ 51 52 53 #ifndef _SB1250_DMA_H 54 #define _SB1250_DMA_H 55 56 57 #include "sb1250_defs.h" 58 59 /* ********************************************************************* 60 * DMA Registers 61 ********************************************************************* */ 62 63 /* 64 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) 65 * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 66 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 67 * Registers: DMA_CONFIG0_SER_x_RX 68 * Registers: DMA_CONFIG0_SER_x_TX 69 */ 70 71 72 #define M_DMA_DROP _SB_MAKEMASK1(0) 73 #define M_DMA_CHAIN_SEL _SB_MAKEMASK1(1) 74 #define M_DMA_RESERVED1 _SB_MAKEMASK1(2) 75 #define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3) 76 #define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4) 77 #define M_DMA_LWM_INT_EN _SB_MAKEMASK1(5) 78 #define M_DMA_TBX_EN _SB_MAKEMASK1(6) 79 #define M_DMA_TDX_EN _SB_MAKEMASK1(7) 80 81 #define S_DMA_INT_PKTCNT _SB_MAKE64(8) 82 #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT) 83 #define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x,S_DMA_INT_PKTCNT) 84 #define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x,S_DMA_INT_PKTCNT,M_DMA_INT_PKTCNT) 85 86 #define S_DMA_RINGSZ _SB_MAKE64(16) 87 #define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ) 88 #define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x,S_DMA_RINGSZ) 89 #define G_DMA_RINGSZ(x) _SB_GETVALUE(x,S_DMA_RINGSZ,M_DMA_RINGSZ) 90 91 #define S_DMA_HIGH_WATERMARK _SB_MAKE64(32) 92 #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK) 93 #define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_HIGH_WATERMARK) 94 #define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x,S_DMA_HIGH_WATERMARK,M_DMA_HIGH_WATERMARK) 95 96 #define S_DMA_LOW_WATERMARK _SB_MAKE64(48) 97 #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK) 98 #define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_LOW_WATERMARK) 99 #define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x,S_DMA_LOW_WATERMARK,M_DMA_LOW_WATERMARK) 100 101 /* 102 * Ethernet and Serial DMA Configuration Register 2 (Table 7-5) 103 * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 104 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 105 * Registers: DMA_CONFIG1_SER_x_RX 106 * Registers: DMA_CONFIG1_SER_x_TX 107 */ 108 109 #define M_DMA_HDR_CF_EN _SB_MAKEMASK1(0) 110 #define M_DMA_ASIC_XFR_EN _SB_MAKEMASK1(1) 111 #define M_DMA_PRE_ADDR_EN _SB_MAKEMASK1(2) 112 #define M_DMA_FLOW_CTL_EN _SB_MAKEMASK1(3) 113 #define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4) 114 #define M_DMA_L2CA _SB_MAKEMASK1(5) 115 116 #define M_DMA_MBZ1 _SB_MAKEMASK(6,15) 117 118 #define S_DMA_HDR_SIZE _SB_MAKE64(21) 119 #define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE) 120 #define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_HDR_SIZE) 121 #define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x,S_DMA_HDR_SIZE,M_DMA_HDR_SIZE) 122 123 #define M_DMA_MBZ2 _SB_MAKEMASK(5,32) 124 125 #define S_DMA_ASICXFR_SIZE _SB_MAKE64(37) 126 #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE) 127 #define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_ASICXFR_SIZE) 128 #define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x,S_DMA_ASICXFR_SIZE,M_DMA_ASICXFR_SIZE) 129 130 #define S_DMA_INT_TIMEOUT _SB_MAKE64(48) 131 #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT) 132 #define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x,S_DMA_INT_TIMEOUT) 133 #define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x,S_DMA_INT_TIMEOUT,M_DMA_INT_TIMEOUT) 134 135 /* 136 * Ethernet and Serial DMA Descriptor base address (Table 7-6) 137 */ 138 139 #define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4,0) 140 141 142 /* 143 * ASIC Mode Base Address (Table 7-7) 144 */ 145 146 #define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20,0) 147 148 /* 149 * DMA Descriptor Count Registers (Table 7-8) 150 */ 151 152 /* No bitfields */ 153 154 155 /* 156 * Current Descriptor Address Register (Table 7-11) 157 */ 158 159 #define S_DMA_CURDSCR_ADDR _SB_MAKE64(0) 160 #define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40,S_DMA_CURDSCR_ADDR) 161 #define S_DMA_CURDSCR_COUNT _SB_MAKE64(48) 162 #define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT) 163 164 /* ********************************************************************* 165 * DMA Descriptors 166 ********************************************************************* */ 167 168 /* 169 * Descriptor doubleword "A" (Table 7-12) 170 */ 171 172 #define S_DMA_DSCRA_OFFSET _SB_MAKE64(0) 173 #define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5,S_DMA_DSCRA_OFFSET) 174 175 /* Note: Don't shift the address over, just mask it with the mask below */ 176 #define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5) 177 #define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35,S_DMA_DSCRA_A_ADDR) 178 179 #define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) 180 181 #define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) 182 #define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE) 183 #define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE) 184 #define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE) 185 186 #define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) 187 #define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) 188 189 #define S_DMA_DSCRA_STATUS _SB_MAKE64(51) 190 #define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13,S_DMA_DSCRA_STATUS) 191 #define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_STATUS) 192 #define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRA_STATUS,M_DMA_DSCRA_STATUS) 193 194 /* 195 * Descriptor doubleword "B" (Table 7-13) 196 */ 197 198 199 #define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0) 200 #define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4,S_DMA_DSCRB_OPTIONS) 201 #define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS) 202 #define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS) 203 204 #define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) 205 206 /* Note: Don't shift the address over, just mask it with the mask below */ 207 #define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5) 208 #define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35,S_DMA_DSCRB_B_ADDR) 209 210 #define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40) 211 #define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9,S_DMA_DSCRB_B_SIZE) 212 #define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_B_SIZE) 213 #define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_B_SIZE,M_DMA_DSCRB_B_SIZE) 214 215 #define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) 216 217 #define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) 218 #define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE) 219 #define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE) 220 #define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE,M_DMA_DSCRB_PKT_SIZE) 221 222 /* 223 * Ethernet Descriptor Status Bits (Table 7-15) 224 */ 225 226 #define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) 227 #define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) 228 229 #define S_DMA_ETHRX_RXCH 53 230 #define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH) 231 #define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_RXCH) 232 #define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x,S_DMA_ETHRX_RXCH,M_DMA_ETHRX_RXCH) 233 234 #define S_DMA_ETHRX_PKTTYPE 55 235 #define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3,S_DMA_ETHRX_PKTTYPE) 236 #define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_PKTTYPE) 237 #define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x,S_DMA_ETHRX_PKTTYPE,M_DMA_ETHRX_PKTTYPE) 238 239 #define K_DMA_ETHRX_PKTTYPE_IPV4 0 240 #define K_DMA_ETHRX_PKTTYPE_ARPV4 1 241 #define K_DMA_ETHRX_PKTTYPE_802 2 242 #define K_DMA_ETHRX_PKTTYPE_OTHER 3 243 #define K_DMA_ETHRX_PKTTYPE_USER0 4 244 #define K_DMA_ETHRX_PKTTYPE_USER1 5 245 #define K_DMA_ETHRX_PKTTYPE_USER2 6 246 #define K_DMA_ETHRX_PKTTYPE_USER3 7 247 248 #define M_DMA_ETHRX_MATCH_EXACT _SB_MAKEMASK1(58) 249 #define M_DMA_ETHRX_MATCH_HASH _SB_MAKEMASK1(59) 250 #define M_DMA_ETHRX_BCAST _SB_MAKEMASK1(60) 251 #define M_DMA_ETHRX_MCAST _SB_MAKEMASK1(61) 252 #define M_DMA_ETHRX_BAD _SB_MAKEMASK1(62) 253 #define M_DMA_ETHRX_SOP _SB_MAKEMASK1(63) 254 255 /* 256 * Ethernet Transmit Status Bits (Table 7-16) 257 */ 258 259 #define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) 260 261 /* 262 * Ethernet Transmit Options (Table 7-17) 263 */ 264 265 #define K_DMA_ETHTX_NOTSOP _SB_MAKE64(0x00) 266 #define K_DMA_ETHTX_APPENDCRC _SB_MAKE64(0x01) 267 #define K_DMA_ETHTX_REPLACECRC _SB_MAKE64(0x02) 268 #define K_DMA_ETHTX_APPENDCRC_APPENDPAD _SB_MAKE64(0x03) 269 #define K_DMA_ETHTX_APPENDVLAN_REPLACECRC _SB_MAKE64(0x04) 270 #define K_DMA_ETHTX_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x05) 271 #define K_DMA_ETHTX_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x6) 272 #define K_DMA_ETHTX_NOMODS _SB_MAKE64(0x07) 273 #define K_DMA_ETHTX_RESERVED1 _SB_MAKE64(0x08) 274 #define K_DMA_ETHTX_REPLACESADDR_APPENDCRC _SB_MAKE64(0x09) 275 #define K_DMA_ETHTX_REPLACESADDR_REPLACECRC _SB_MAKE64(0x0A) 276 #define K_DMA_ETHTX_REPLACESADDR_APPENDCRC_APPENDPAD _SB_MAKE64(0x0B) 277 #define K_DMA_ETHTX_REPLACESADDR_APPENDVLAN_REPLACECRC _SB_MAKE64(0x0C) 278 #define K_DMA_ETHTX_REPLACESADDR_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x0D) 279 #define K_DMA_ETHTX_REPLACESADDR_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x0E) 280 #define K_DMA_ETHTX_RESERVED2 _SB_MAKE64(0x0F) 281 282 /* 283 * Serial Receive Options (Table 7-18) 284 */ 285 #define M_DMA_SERRX_CRC_ERROR _SB_MAKEMASK1(56) 286 #define M_DMA_SERRX_ABORT _SB_MAKEMASK1(57) 287 #define M_DMA_SERRX_OCTET_ERROR _SB_MAKEMASK1(58) 288 #define M_DMA_SERRX_LONGFRAME_ERROR _SB_MAKEMASK1(59) 289 #define M_DMA_SERRX_SHORTFRAME_ERROR _SB_MAKEMASK1(60) 290 #define M_DMA_SERRX_OVERRUN_ERROR _SB_MAKEMASK1(61) 291 #define M_DMA_SERRX_GOOD _SB_MAKEMASK1(62) 292 #define M_DMA_SERRX_SOP _SB_MAKEMASK1(63) 293 294 /* 295 * Serial Transmit Status Bits (Table 7-20) 296 */ 297 298 #define M_DMA_SERTX_FLAG _SB_MAKEMASK1(63) 299 300 /* 301 * Serial Transmit Options (Table 7-21) 302 */ 303 304 #define K_DMA_SERTX_RESERVED _SB_MAKEMASK1(0) 305 #define K_DMA_SERTX_APPENDCRC _SB_MAKEMASK1(1) 306 #define K_DMA_SERTX_APPENDPAD _SB_MAKEMASK1(2) 307 #define K_DMA_SERTX_ABORT _SB_MAKEMASK1(3) 308 309 310 /* ********************************************************************* 311 * Data Mover Registers 312 ********************************************************************* */ 313 314 /* 315 * Data Mover Descriptor Base Address Register (Table 7-22) 316 * Register: DM_DSCR_BASE_0 317 * Register: DM_DSCR_BASE_1 318 * Register: DM_DSCR_BASE_2 319 * Register: DM_DSCR_BASE_3 320 */ 321 322 #define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(3,0) 323 324 /* Note: Just mask the base address and then OR it in. */ 325 #define S_DM_DSCR_BASE_ADDR _SB_MAKE64(3) 326 #define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36,S_DM_DSCR_BASE_ADDR) 327 328 #define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40) 329 #define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16,S_DM_DSCR_BASE_RINGSZ) 330 #define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_RINGSZ) 331 #define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_RINGSZ,M_DM_DSCR_BASE_RINGSZ) 332 333 #define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56) 334 #define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3,S_DM_DSCR_BASE_PRIORITY) 335 #define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_PRIORITY) 336 #define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_PRIORITY,M_DM_DSCR_BASE_PRIORITY) 337 338 #define K_DM_DSCR_BASE_PRIORITY_1 0 339 #define K_DM_DSCR_BASE_PRIORITY_2 1 340 #define K_DM_DSCR_BASE_PRIORITY_4 2 341 #define K_DM_DSCR_BASE_PRIORITY_8 3 342 #define K_DM_DSCR_BASE_PRIORITY_16 4 343 344 #define M_DM_DSCR_BASE_ACTIVE _SB_MAKEMASK1(59) 345 #define M_DM_DSCR_BASE_INTERRUPT _SB_MAKEMASK1(60) 346 #define M_DM_DSCR_BASE_RESET _SB_MAKEMASK1(61) /* write register */ 347 #define M_DM_DSCR_BASE_ERROR _SB_MAKEMASK1(61) /* read register */ 348 #define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) 349 #define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) 350 351 /* 352 * Data Mover Descriptor Count Register (Table 7-25) 353 */ 354 355 /* no bitfields */ 356 357 /* 358 * Data Mover Current Descriptor Address (Table 7-24) 359 * Register: DM_CUR_DSCR_ADDR_0 360 * Register: DM_CUR_DSCR_ADDR_1 361 * Register: DM_CUR_DSCR_ADDR_2 362 * Register: DM_CUR_DSCR_ADDR_3 363 */ 364 365 #define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0) 366 #define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40,S_DM_CUR_DSCR_DSCR_ADDR) 367 368 #define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48) 369 #define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16,S_DM_CUR_DSCR_DSCR_COUNT) 370 #define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT) 371 #define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT, \ 372 M_DM_CUR_DSCR_DSCR_COUNT) 373 374 /* 375 * Data Mover Descriptor Doubleword "A" (Table 7-26) 376 */ 377 378 #define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0) 379 #define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40,S_DM_DSCRA_DST_ADDR) 380 381 #define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40) 382 #define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41) 383 #define M_DM_DSCRA_INTERRUPT _SB_MAKEMASK1(42) 384 #define M_DM_DSCRA_THROTTLE _SB_MAKEMASK1(43) 385 386 #define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44) 387 #define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2,S_DM_DSCRA_DIR_DEST) 388 #define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_DEST) 389 #define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_DEST,M_DM_DSCRA_DIR_DEST) 390 391 #define K_DM_DSCRA_DIR_DEST_INCR 0 392 #define K_DM_DSCRA_DIR_DEST_DECR 1 393 #define K_DM_DSCRA_DIR_DEST_CONST 2 394 395 #define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR,S_DM_DSCRA_DIR_DEST) 396 #define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR,S_DM_DSCRA_DIR_DEST) 397 #define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST,S_DM_DSCRA_DIR_DEST) 398 399 #define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46) 400 #define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2,S_DM_DSCRA_DIR_SRC) 401 #define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_SRC) 402 #define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_SRC,M_DM_DSCRA_DIR_SRC) 403 404 #define K_DM_DSCRA_DIR_SRC_INCR 0 405 #define K_DM_DSCRA_DIR_SRC_DECR 1 406 #define K_DM_DSCRA_DIR_SRC_CONST 2 407 408 #define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR,S_DM_DSCRA_DIR_SRC) 409 #define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR,S_DM_DSCRA_DIR_SRC) 410 #define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST,S_DM_DSCRA_DIR_SRC) 411 412 413 #define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48) 414 #define M_DM_DSCRA_PREFETCH _SB_MAKEMASK1(49) 415 #define M_DM_DSCRA_L2C_DEST _SB_MAKEMASK1(50) 416 #define M_DM_DSCRA_L2C_SRC _SB_MAKEMASK1(51) 417 418 #define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(12,52) 419 420 /* 421 * Data Mover Descriptor Doubleword "B" (Table 7-25) 422 */ 423 424 #define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0) 425 #define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40,S_DM_DSCRB_SRC_ADDR) 426 427 #define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40) 428 #define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20,S_DM_DSCRB_SRC_LENGTH) 429 #define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x,S_DM_DSCRB_SRC_LENGTH) 430 #define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x,S_DM_DSCRB_SRC_LENGTH,M_DM_DSCRB_SRC_LENGTH) 431 432 433 #endif 434