1 /* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * Generic Bus Constants File: sb1250_genbus.h 5 * 6 * This module contains constants and macros useful for 7 * manipulating the SB1250's Generic Bus interface 8 * 9 * SB1250 specification level: 0.2 10 * 11 * Author: Mitch Lichtenberg (mitch@sibyte.com) 12 * 13 ********************************************************************* 14 * 15 * Copyright 2000,2001 16 * Broadcom Corporation. All rights reserved. 17 * 18 * This software is furnished under license and may be used and 19 * copied only in accordance with the following terms and 20 * conditions. Subject to these conditions, you may download, 21 * copy, install, use, modify and distribute modified or unmodified 22 * copies of this software in source and/or binary form. No title 23 * or ownership is transferred hereby. 24 * 25 * 1) Any source code used, modified or distributed must reproduce 26 * and retain this copyright notice and list of conditions as 27 * they appear in the source file. 28 * 29 * 2) No right is granted to use any trade name, trademark, or 30 * logo of Broadcom Corporation. Neither the "Broadcom 31 * Corporation" name nor any trademark or logo of Broadcom 32 * Corporation may be used to endorse or promote products 33 * derived from this software without the prior written 34 * permission of Broadcom Corporation. 35 * 36 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 37 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 38 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 39 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 40 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 41 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 42 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 44 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 45 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 46 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 47 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 48 * THE POSSIBILITY OF SUCH DAMAGE. 49 ********************************************************************* */ 50 51 52 #ifndef _SB1250_GENBUS_H 53 #define _SB1250_GENBUS_H 54 55 #include "sb1250_defs.h" 56 57 /* 58 * Generic Bus Region Configuration Registers (Table 11-4) 59 */ 60 61 #define M_IO_RDY_ACTIVE _SB_MAKEMASK1(0) 62 #define M_IO_ENA_RDY _SB_MAKEMASK1(1) 63 64 #define S_IO_WIDTH_SEL 2 65 #define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL) 66 #define K_IO_WIDTH_SEL_1 0 67 #define K_IO_WIDTH_SEL_2 1 68 #define K_IO_WIDTH_SEL_4 3 69 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL) 70 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL) 71 72 #define M_IO_PARITY_ENA _SB_MAKEMASK1(4) 73 #define M_IO_PARITY_ODD _SB_MAKEMASK1(6) 74 #define M_IO_NONMUX _SB_MAKEMASK1(7) 75 76 #define S_IO_TIMEOUT 8 77 #define M_IO_TIMEOUT _SB_MAKEMASK(8,S_IO_TIMEOUT) 78 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x,S_IO_TIMEOUT) 79 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x,S_IO_TIMEOUT,M_IO_TIMEOUT) 80 81 /* 82 * Generic Bus Region Size register (Table 11-5) 83 */ 84 85 #define S_IO_MULT_SIZE 0 86 #define M_IO_MULT_SIZE _SB_MAKEMASK(12,S_IO_MULT_SIZE) 87 #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x,S_IO_MULT_SIZE) 88 #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x,S_IO_MULT_SIZE,M_IO_MULT_SIZE) 89 90 #define S_IO_REGSIZE 16 /* # bits to shift size for this reg */ 91 92 /* 93 * Generic Bus Region Address (Table 11-6) 94 */ 95 96 #define S_IO_START_ADDR 0 97 #define M_IO_START_ADDR _SB_MAKEMASK(14,S_IO_START_ADDR) 98 #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x,S_IO_START_ADDR) 99 #define G_IO_START_ADDR(x) _SB_GETVALUE(x,S_IO_START_ADDR,M_IO_START_ADDR) 100 101 #define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */ 102 103 /* 104 * Generic Bus Region 0 Timing Registers (Table 11-7) 105 */ 106 107 #define S_IO_ALE_WIDTH 0 108 #define M_IO_ALE_WIDTH _SB_MAKEMASK(3,S_IO_ALE_WIDTH) 109 #define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH) 110 #define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH) 111 112 #define S_IO_ALE_TO_CS 4 113 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS) 114 #define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS) 115 #define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS) 116 117 #define S_IO_CS_WIDTH 8 118 #define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH) 119 #define V_IO_CS_WIDTH(x) _SB_MAKEVALUE(x,S_IO_CS_WIDTH) 120 #define G_IO_CS_WIDTH(x) _SB_GETVALUE(x,S_IO_CS_WIDTH,M_IO_CS_WIDTH) 121 122 #define S_IO_RDY_SMPLE 13 123 #define M_IO_RDY_SMPLE _SB_MAKEMASK(3,S_IO_RDY_SMPLE) 124 #define V_IO_RDY_SMPLE(x) _SB_MAKEVALUE(x,S_IO_RDY_SMPLE) 125 #define G_IO_RDY_SMPLE(x) _SB_GETVALUE(x,S_IO_RDY_SMPLE,M_IO_RDY_SMPLE) 126 127 128 /* 129 * Generic Bus Timing 1 Registers (Table 11-8) 130 */ 131 132 #define S_IO_ALE_TO_WRITE 0 133 #define M_IO_ALE_TO_WRITE _SB_MAKEMASK(3,S_IO_ALE_TO_WRITE) 134 #define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE) 135 #define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE) 136 137 #define S_IO_WRITE_WIDTH 4 138 #define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH) 139 #define V_IO_WRITE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_WRITE_WIDTH) 140 #define G_IO_WRITE_WIDTH(x) _SB_GETVALUE(x,S_IO_WRITE_WIDTH,M_IO_WRITE_WIDTH) 141 142 #define S_IO_IDLE_CYCLE 8 143 #define M_IO_IDLE_CYCLE _SB_MAKEMASK(4,S_IO_IDLE_CYCLE) 144 #define V_IO_IDLE_CYCLE(x) _SB_MAKEVALUE(x,S_IO_IDLE_CYCLE) 145 #define G_IO_IDLE_CYCLE(x) _SB_GETVALUE(x,S_IO_IDLE_CYCLE,M_IO_IDLE_CYCLE) 146 147 #define S_IO_CS_TO_OE 12 148 #define M_IO_CS_TO_OE _SB_MAKEMASK(2,S_IO_CS_TO_OE) 149 #define V_IO_CS_TO_OE(x) _SB_MAKEVALUE(x,S_IO_CS_TO_OE) 150 #define G_IO_CS_TO_OE(x) _SB_GETVALUE(x,S_IO_CS_TO_OE,M_IO_CS_TO_OE) 151 152 #define S_IO_OE_TO_CS 14 153 #define M_IO_OE_TO_CS _SB_MAKEMASK(2,S_IO_OE_TO_CS) 154 #define V_IO_OE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_OE_TO_CS) 155 #define G_IO_OE_TO_CS(x) _SB_GETVALUE(x,S_IO_OE_TO_CS,M_IO_OE_TO_CS) 156 157 /* 158 * Generic Bus Interrupt Status Register (Table 11-9) 159 */ 160 161 #define M_IO_CS_ERR_INT _SB_MAKEMASK(0,8) 162 #define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0) 163 #define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1) 164 #define M_IO_CS2_ERR_INT _SB_MAKEMASK1(2) 165 #define M_IO_CS3_ERR_INT _SB_MAKEMASK1(3) 166 #define M_IO_CS4_ERR_INT _SB_MAKEMASK1(4) 167 #define M_IO_CS5_ERR_INT _SB_MAKEMASK1(5) 168 #define M_IO_CS6_ERR_INT _SB_MAKEMASK1(6) 169 #define M_IO_CS7_ERR_INT _SB_MAKEMASK1(7) 170 171 #define M_IO_RD_PAR_INT _SB_MAKEMASK1(9) 172 #define M_IO_TIMEOUT_INT _SB_MAKEMASK1(10) 173 #define M_IO_ILL_ADDR_INT _SB_MAKEMASK1(11) 174 #define M_IO_MULT_CS_INT _SB_MAKEMASK1(12) 175 176 /* 177 * PCMCIA configuration register (Table 12-6) 178 */ 179 180 #define M_PCMCIA_CFG_ATTRMEM _SB_MAKEMASK1(0) 181 #define M_PCMCIA_CFG_3VEN _SB_MAKEMASK1(1) 182 #define M_PCMCIA_CFG_5VEN _SB_MAKEMASK1(2) 183 #define M_PCMCIA_CFG_VPPEN _SB_MAKEMASK1(3) 184 #define M_PCMCIA_CFG_RESET _SB_MAKEMASK1(4) 185 #define M_PCMCIA_CFG_APWRONEN _SB_MAKEMASK1(5) 186 #define M_PCMCIA_CFG_CDMASK _SB_MAKEMASK1(6) 187 #define M_PCMCIA_CFG_WPMASK _SB_MAKEMASK1(7) 188 #define M_PCMCIA_CFG_RDYMASK _SB_MAKEMASK1(8) 189 #define M_PCMCIA_CFG_PWRCTL _SB_MAKEMASK1(9) 190 191 /* 192 * PCMCIA status register (Table 12-7) 193 */ 194 195 #define M_PCMCIA_STATUS_CD1 _SB_MAKEMASK1(0) 196 #define M_PCMCIA_STATUS_CD2 _SB_MAKEMASK1(1) 197 #define M_PCMCIA_STATUS_VS1 _SB_MAKEMASK1(2) 198 #define M_PCMCIA_STATUS_VS2 _SB_MAKEMASK1(3) 199 #define M_PCMCIA_STATUS_WP _SB_MAKEMASK1(4) 200 #define M_PCMCIA_STATUS_RDY _SB_MAKEMASK1(5) 201 #define M_PCMCIA_STATUS_3VEN _SB_MAKEMASK1(6) 202 #define M_PCMCIA_STATUS_5VEN _SB_MAKEMASK1(7) 203 #define M_PCMCIA_STATUS_CDCHG _SB_MAKEMASK1(8) 204 #define M_PCMCIA_STATUS_WPCHG _SB_MAKEMASK1(9) 205 #define M_PCMCIA_STATUS_RDYCHG _SB_MAKEMASK1(10) 206 207 /* 208 * GPIO Interrupt Type Register (table 13-3) 209 */ 210 211 #define K_GPIO_INTR_DISABLE 0 212 #define K_GPIO_INTR_EDGE 1 213 #define K_GPIO_INTR_LEVEL 2 214 #define K_GPIO_INTR_SPLIT 3 215 216 #define S_GPIO_INTR_TYPEX(n) (((n)/2)*2) 217 #define M_GPIO_INTR_TYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_TYPEX(n)) 218 #define V_GPIO_INTR_TYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPEX(n)) 219 #define G_GPIO_INTR_TYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_TYPEX(n),M_GPIO_INTR_TYPEX(n)) 220 221 #define S_GPIO_INTR_TYPE0 0 222 #define M_GPIO_INTR_TYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE0) 223 #define V_GPIO_INTR_TYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE0) 224 #define G_GPIO_INTR_TYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE0,M_GPIO_INTR_TYPE0) 225 226 #define S_GPIO_INTR_TYPE2 2 227 #define M_GPIO_INTR_TYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE2) 228 #define V_GPIO_INTR_TYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE2) 229 #define G_GPIO_INTR_TYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE2,M_GPIO_INTR_TYPE2) 230 231 #define S_GPIO_INTR_TYPE4 4 232 #define M_GPIO_INTR_TYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE4) 233 #define V_GPIO_INTR_TYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE4) 234 #define G_GPIO_INTR_TYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE4,M_GPIO_INTR_TYPE4) 235 236 #define S_GPIO_INTR_TYPE6 6 237 #define M_GPIO_INTR_TYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE6) 238 #define V_GPIO_INTR_TYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE6) 239 #define G_GPIO_INTR_TYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE6,M_GPIO_INTR_TYPE6) 240 241 #define S_GPIO_INTR_TYPE8 8 242 #define M_GPIO_INTR_TYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE8) 243 #define V_GPIO_INTR_TYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE8) 244 #define G_GPIO_INTR_TYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE8,M_GPIO_INTR_TYPE8) 245 246 #define S_GPIO_INTR_TYPE10 10 247 #define M_GPIO_INTR_TYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE10) 248 #define V_GPIO_INTR_TYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE10) 249 #define G_GPIO_INTR_TYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE10,M_GPIO_INTR_TYPE10) 250 251 #define S_GPIO_INTR_TYPE12 12 252 #define M_GPIO_INTR_TYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE12) 253 #define V_GPIO_INTR_TYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE12) 254 #define G_GPIO_INTR_TYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE12,M_GPIO_INTR_TYPE12) 255 256 #define S_GPIO_INTR_TYPE14 14 257 #define M_GPIO_INTR_TYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE14) 258 #define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14) 259 #define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14) 260 261 262 #endif 263