xref: /netbsd/sys/arch/mipsco/include/mainboard.h (revision bf9ec67e)
1 /*	$NetBSD: mainboard.h,v 1.3 2001/03/31 00:08:34 wdk Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Wayne Knowles
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  *
41  * Define all hardware address map.
42  */
43 
44 #ifndef _MACHINE_MAINBOARD_H_
45 #define	_MACHINE_MAINBOARD_H_	1
46 
47 /*----------------------------------------------------------------------
48  */
49 #define TOD_BASE        0xbd000000
50 #define	RTC_PORT	    0x1fe3
51 #define	DATA_PORT	    0x1fe7
52 
53 #define RAMBO_BASE      0xbc000000 /* Base address for RAMBO DMA */
54 
55 #define RAMBO_TCOUNT    (RAMBO_BASE+0xc00) /* Timer count register */
56 #define RAMBO_TBREAK    (RAMBO_BASE+0xd00) /* Timner break register */
57 #define RAMBO_ERREG	(RAMBO_BASE+0xe00) /* Machine error register */
58 #define RAMBO_CTL       (RAMBO_BASE+0xf00) /* Machine control register */
59 
60 #define	LANCE_PORT	0xba000000
61 #define	ETHER_ID	0xbd000000
62 
63 #define ZS0_ADDR        0xbb000000
64 
65 #define INTREG_0        0xb9800003         /* Interrupt 0 status register  */
66 #define    INT_CEB      0x80	           /* Modem call indicator */
67 #define    INT_DSRB     0x40               /* Data Set Ready */
68 #define    INT_DRSInB   0x20               /* Data Rate Select (in) */
69 #define    INT_Lance    0x10               /* Lance Ethernet */
70 #define    INT_NCR      0x08               /* NCR 53c94 SCSI */
71 #define    INT_SCC      0x04               /* Z8530 SCC */
72 #define    INT_Kbd      0x02               /* Keyboard controller */
73 #define    INT_ExpSlot  0x01               /* Expansion Slot */
74 
75 #define PIZAZZ_ISA_IOBASE	0x10000000 /* ISA Bus I/O */
76 #define PIZAZZ_ISA_IOSIZE	0x00040000 /* 64k -> 256k */
77 #define PIZAZZ_ISA_MEMBASE	0x14000000 /* ISA Bus Memory */
78 #define PIZAZZ_ISA_MEMSIZE	0x00100000 /* 16MB -> 64MB */
79 #define PIZAZZ_ISA_INTRLATCH	0x10400000 /* Interrupt Latch */
80 
81 #endif /* _MACHINE_MAINBOARD_H_ */
82