xref: /netbsd/sys/arch/mmeye/mmeye/locore.S (revision bf9ec67e)
1/*	$NetBSD: locore.S,v 1.5 2002/05/09 12:35:45 uch Exp $	*/
2
3/*-
4 * Copyright (c) 1993, 1994, 1995, 1997
5 *	Charles M. Hannum.  All rights reserved.
6 * Copyright (c) 1990 The Regents of the University of California.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to Berkeley by
10 * William Jolitz.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 *    must display the following acknowledgement:
22 *	This product includes software developed by the University of
23 *	California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 *    may be used to endorse or promote products derived from this software
26 *    without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 *	@(#)locore.s	7.3 (Berkeley) 5/13/91
41 */
42
43#include "opt_cputype.h"
44#include "opt_memsize.h"
45#include "assym.h"
46
47#if defined(SH3) && defined(SH4)
48#error "mmeye port don't support SH3,SH4 common kernel."
49#endif
50
51#include <sh3/asm.h>
52#include <sh3/locore.h>
53#include <sh3/exception.h>
54#include <sh3/cache_sh3.h>
55#include <sh3/cache_sh4.h>
56#include <sh3/mmu_sh3.h>
57#include <sh3/mmu_sh4.h>
58
59#define	INIT_STACK							\
60	((IOM_RAM_BEGIN + IOM_RAM_SIZE - 0x00001000) | 0x80000000)
61
62NENTRY(start)
63	/* Set SP to initial position */
64	mov.l	XLtmpstk, r15
65
66	__INTR_MASK(r0, r1)
67
68	/* Set Register Bank to Bank 0 */
69	mov.l	SR_init, r0
70	ldc	r0, sr
71
72	xor	r0, r0
73	MOV	(MMUCR, r2)
74	mov.l	r0, @r2		/* MMU OFF */
75
76	bra	start1
77	nop
78	.align	2
79SR_init:	.long	0x500000F0
80REG_SYMBOL(MMUCR)
81start1:
82
83#ifdef ROMIMAGE
84	/* Initialize BUS State Control Regs. */
85	mov.l	_ROM_START, r3
86	mov.l	_C_LABEL(ram_start), r4
87	sub	r3, r4
88	/* Set Bus State Controler */
89	mov.l	XLInitializeBsc, r0
90	sub	r4, r0
91	jsr	@r0
92	nop
93
94	/* Move kernel image from ROM area to RAM area */
95	mov.l	___end, r0
96	mov.l	___start, r1
97	mov.l	_KERNBASE, r2
98	sub	r2, r0
99	sub	r2, r1
100	sub	r1, r0
101	add	#4, r0		/* size of bytes to be copied */
102	shlr2	r0		/* number of long word */
103	mov.l	_ROM_START, r3
104	add	r3, r1		/* src address */
105	mov.l	___start, r3
106	sub	r2, r3
107	mov.l	_C_LABEL(ram_start), r4
108	add	r4, r3		/* dest address */
1091:
110	mov.l	@r1+, r4
111	mov.l	r4, @r3
112	add	#4, r3
113	dt	r0		/* decrement and Test */
114	bf	1b
115	/* kernel image copy end */
116
117	mov.l	LXstart_in_RAM, r0
118	jmp	@r0		/* jump to RAM area */
119	nop
120
121	.align	2
122LXstart_in_RAM:
123	.long	start_in_RAM
124#else /* ROMIMAGE */
125	/* Set Bus State Controler */
126	mov.l	XLInitializeBsc, r0
127	jsr	@r0
128	nop
129#endif /* ROMIMAGE */
130
131start_in_RAM:
132	mova	1f, r0
133	mov	r0, r4
134	mov.l	XLinitSH3, r0
135	jsr	@r0		/* call initSH3() */
136	nop
137
138	.align	2
1391:
140
141	mov.l	XLmain, r0
142	jsr	@r0		/* call main() */
143	nop
144
145		.align	2
146
147XLInitializeBsc:.long	_C_LABEL(InitializeBsc)
148___start:	.long	start
149___etext:	.long	_etext
150___end:		.long	_end
151XLtmpstk:	.long	INIT_STACK
152_KERNBASE:	.long	0x8c000000
153_ROM_START:	.long	IOM_ROM_BEGIN
154XLinitSH3:	.long	_C_LABEL(initSH3)
155XLmain:		.long	_C_LABEL(main)
156
157load_and_reset:
158	mov.l	XL_start_address, r0
159	mov	r0, r8
160	mov.l	@r4+, r1	/* r1 = osimage size */
161	mov.l	@r4+, r2	/* r2 = check sum */
162	shlr2	r1		/* r1 = osimage size in dword */
1631:
164	mov.l	@r4+, r3
165	mov.l	r3, @r0
166	add	#4, r0
167	dt	r1
168	bf	1b
169
170	jmp	@r8		/* jump to start address */
171	nop
172
173	.align	2
174XL_start_address:
175	.long	IOM_RAM_BEGIN + 0x00010000
176load_and_reset_end:
177
178ENTRY(XLoadAndReset)
179	__INTR_MASK(r0, r1)
180	/* copy trampoline code to RAM area top */
181	mov.l	XL_load_and_reset, r0
182	mov.l	XL_load_and_reset_end, r1
183	mov.l	XL_load_trampoline_addr, r2
184	mov	r2, r8
185	sub	r0, r1		/* r1 = bytes to be copied */
1861:	mov.b	@r0+, r3
187	mov.b	r3, @r2
188	add	#1, r2
189	dt	r1
190	bf	1b
191
192	jmp	@r8		/* jump to trampoline code */
193	nop
194
195	.align	2
196XL_load_trampoline_addr:
197	.long	IOM_RAM_BEGIN + 0x00008000
198XL_load_and_reset:
199	.long	load_and_reset
200XL_load_and_reset_end:
201	.long	load_and_reset_end
202
203	.data
204	.align	2
205	.globl	_C_LABEL(intrcnt), _C_LABEL(eintrcnt)
206	.globl	_C_LABEL(intrnames), _C_LABEL(eintrnames)
207_C_LABEL(intrcnt):
208_C_LABEL(eintrcnt):
209_C_LABEL(intrnames):
210_C_LABEL(eintrnames):
211