1 /* $NetBSD: clock_pcc.c,v 1.11 2002/02/12 20:38:12 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Glue for the Peripheral Channel Controller timers and the 41 * Mostek clock chip found on the MVME-147. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/kernel.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/psl.h> 50 #include <machine/bus.h> 51 52 #include <dev/mvme/clockvar.h> 53 54 #include <mvme68k/dev/pccreg.h> 55 #include <mvme68k/dev/pccvar.h> 56 57 int clock_pcc_match __P((struct device *, struct cfdata *, void *)); 58 void clock_pcc_attach __P((struct device *, struct device *, void *)); 59 60 struct clock_pcc_softc { 61 struct device sc_dev; 62 struct clock_attach_args sc_clock_args; 63 u_char sc_clock_lvl; 64 }; 65 66 struct cfattach clock_pcc_ca = { 67 sizeof(struct clock_pcc_softc), clock_pcc_match, clock_pcc_attach 68 }; 69 70 extern struct cfdriver clock_cd; 71 72 73 static int clock_pcc_profintr __P((void *)); 74 static int clock_pcc_statintr __P((void *)); 75 static void clock_pcc_initclocks __P((void *, int, int)); 76 static long clock_pcc_microtime __P((void *)); 77 static void clock_pcc_shutdown __P((void *)); 78 79 static struct clock_pcc_softc *clock_pcc_sc; 80 81 /* ARGSUSED */ 82 int 83 clock_pcc_match(parent, cf, aux) 84 struct device *parent; 85 struct cfdata *cf; 86 void *aux; 87 { 88 struct pcc_attach_args *pa; 89 90 pa = aux; 91 92 /* Only one clock, please. */ 93 if (clock_pcc_sc) 94 return (0); 95 96 if (strcmp(pa->pa_name, clock_cd.cd_name)) 97 return (0); 98 99 pa->pa_ipl = cf->pcccf_ipl; 100 101 return (1); 102 } 103 104 /* ARGSUSED */ 105 void 106 clock_pcc_attach(parent, self, aux) 107 struct device *parent; 108 struct device *self; 109 void *aux; 110 { 111 struct pcc_attach_args *pa; 112 struct clock_pcc_softc *sc; 113 114 sc = (struct clock_pcc_softc *) self; 115 pa = aux; 116 117 if (pa->pa_ipl != CLOCK_LEVEL) 118 panic("clock_pcc_attach: wrong interrupt level"); 119 120 clock_pcc_sc = sc; 121 sc->sc_clock_args.ca_arg = sc; 122 sc->sc_clock_args.ca_initfunc = clock_pcc_initclocks; 123 sc->sc_clock_args.ca_microtime = clock_pcc_microtime; 124 125 /* Do common portions of clock config. */ 126 clock_config(self, &sc->sc_clock_args, pccintr_evcnt(pa->pa_ipl)); 127 128 /* Ensure our interrupts get disabled at shutdown time. */ 129 (void) shutdownhook_establish(clock_pcc_shutdown, NULL); 130 131 /* Attach the interrupt handlers. */ 132 pccintr_establish(PCCV_TIMER1, clock_pcc_profintr, pa->pa_ipl, 133 NULL, &clock_profcnt); 134 pccintr_establish(PCCV_TIMER2, clock_pcc_statintr, pa->pa_ipl, 135 NULL, &clock_statcnt); 136 sc->sc_clock_lvl = pa->pa_ipl | PCC_IENABLE | PCC_TIMERACK; 137 } 138 139 void 140 clock_pcc_initclocks(arg, proftick, stattick) 141 void *arg; 142 int proftick; 143 int stattick; 144 { 145 struct clock_pcc_softc *sc = arg; 146 147 pcc_reg_write16(sys_pcc, PCCREG_TMR1_PRELOAD, 148 pcc_timer_us2lim(proftick)); 149 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 150 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERSTART); 151 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, sc->sc_clock_lvl); 152 153 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 154 pcc_timer_us2lim(stattick)); 155 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 156 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 157 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, sc->sc_clock_lvl); 158 } 159 160 /* ARGSUSED */ 161 long 162 clock_pcc_microtime(arg) 163 void *arg; 164 { 165 static int ovfl_adj[] = { 166 0, 10000, 20000, 30000, 167 40000, 50000, 60000, 70000, 168 80000, 90000, 100000, 110000, 169 120000, 130000, 140000, 150000}; 170 u_int8_t cr; 171 u_int16_t tc, tc2; 172 173 /* 174 * There's no way to latch the counter and overflow registers 175 * without pausing the clock, so compensate for the possible 176 * race by checking for counter wrap-around and re-reading the 177 * overflow counter if necessary. 178 * 179 * Note: This only works because we're called at splhigh(). 180 */ 181 tc = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT); 182 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 183 if (tc > (tc2 = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT))) { 184 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 185 tc = tc2; 186 } 187 188 return ((long) pcc_timer_cnt2us(tc) + ovfl_adj[cr>>PCC_TIMEROVFLSHIFT]); 189 } 190 191 int 192 clock_pcc_profintr(frame) 193 void *frame; 194 { 195 u_int8_t cr; 196 u_int16_t tc; 197 int s; 198 199 s = splhigh(); 200 tc = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT); 201 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 202 if (tc > pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT)) 203 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 204 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERSTART); 205 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 206 clock_pcc_sc->sc_clock_lvl); 207 splx(s); 208 209 for (cr >>= PCC_TIMEROVFLSHIFT; cr; cr--) 210 hardclock(frame); 211 212 return (1); 213 } 214 215 int 216 clock_pcc_statintr(frame) 217 void *frame; 218 { 219 220 /* Disable the timer interrupt while we handle it. */ 221 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 222 223 statclock((struct clockframe *) frame); 224 225 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 226 pcc_timer_us2lim(CLOCK_NEWINT(clock_statvar, clock_statmin))); 227 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 228 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 229 230 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 231 clock_pcc_sc->sc_clock_lvl); 232 233 return (1); 234 } 235 236 /* ARGSUSED */ 237 void 238 clock_pcc_shutdown(arg) 239 void *arg; 240 { 241 242 /* Make sure the timer interrupts are turned off. */ 243 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 244 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 0); 245 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 246 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 247 } 248