xref: /netbsd/sys/arch/mvmeppc/pci/pci_machdep.c (revision bf9ec67e)
1 /*	$NetBSD: pci_machdep.c,v 1.1 2002/02/27 21:02:26 scw Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Charles M. Hannum.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Machine-specific functions for PCI autoconfiguration.
35  *
36  * On PCs, there are two methods of generating PCI configuration cycles.
37  * We try to detect the appropriate mechanism for this machine and set
38  * up a few function pointers to access the correct method directly.
39  */
40 
41 #include <sys/types.h>
42 #include <sys/param.h>
43 #include <sys/time.h>
44 #include <sys/systm.h>
45 #include <sys/errno.h>
46 #include <sys/device.h>
47 
48 #include <uvm/uvm_extern.h>
49 
50 #define _POWERPC_BUS_DMA_PRIVATE
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 #include <machine/platform.h>
54 
55 #include <dev/isa/isavar.h>
56 #include <dev/pci/pcivar.h>
57 #include <dev/pci/pcireg.h>
58 #include <dev/pci/pcidevs.h>
59 
60 #define	PCI_MODE1_ENABLE	0x80000000UL
61 #define	PCI_MODE1_ADDRESS_REG	(MVMEPPC_KVA_BASE_IO + 0xcf8)
62 #define	PCI_MODE1_DATA_REG	(MVMEPPC_KVA_BASE_IO + 0xcfc)
63 
64 #define	o2i(off)	((off)/sizeof(pcireg_t))
65 
66 void pci_intr_fixup(int, int, int *);
67 
68 #ifdef DEBUG
69 #define	DPRF(x)	printf x
70 #else
71 #define	DPRF(x)
72 #endif
73 
74 /*
75  * PCI doesn't have any special needs; just use the generic versions
76  * of these functions.
77  */
78 struct powerpc_bus_dma_tag pci_bus_dma_tag = {
79 	0,			/* _bounce_thresh */
80 	_bus_dmamap_create,
81 	_bus_dmamap_destroy,
82 	_bus_dmamap_load,
83 	_bus_dmamap_load_mbuf,
84 	_bus_dmamap_load_uio,
85 	_bus_dmamap_load_raw,
86 	_bus_dmamap_unload,
87 	NULL,			/* _dmamap_sync */
88 	_bus_dmamem_alloc,
89 	_bus_dmamem_free,
90 	_bus_dmamem_map,
91 	_bus_dmamem_unmap,
92 	_bus_dmamem_mmap,
93 };
94 
95 void
96 pci_attach_hook(struct device *parent, struct device *self,
97     struct pcibus_attach_args *pba)
98 {
99 
100 	/* Nothing to do. */
101 }
102 
103 int
104 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
105 {
106 
107 	/*
108 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
109 	 * use, can have devices 0-32 (i.e. the `normal' range).
110 	 */
111 	return (32);
112 }
113 
114 pcitag_t
115 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
116 {
117 	pcitag_t tag;
118 
119 	if (bus >= 256 || device >= 32 || function >= 8)
120 		panic("pci_make_tag: bad request");
121 
122 	tag = PCI_MODE1_ENABLE |
123 		    (bus << 16) | (device << 11) | (function << 8);
124 	return tag;
125 }
126 
127 void
128 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
129 {
130 
131 	if (bp != NULL)
132 		*bp = (tag >> 16) & 0xff;
133 	if (dp != NULL)
134 		*dp = (tag >> 11) & 0x1f;
135 	if (fp != NULL)
136 		*fp = (tag >> 8) & 0x7;
137 	return;
138 }
139 
140 pcireg_t
141 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
142 {
143 	pcireg_t data;
144 
145 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
146 	data = in32rb(PCI_MODE1_DATA_REG);
147 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
148 	return data;
149 }
150 
151 void
152 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
153 {
154 
155 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
156 	out32rb(PCI_MODE1_DATA_REG, data);
157 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
158 }
159 
160 int
161 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
162 {
163 	int pin = pa->pa_intrpin;
164 	int line = pa->pa_intrline;
165 
166 	if (pin == 0) {
167 		/* No IRQ used. */
168 		goto bad;
169 	}
170 
171 	if (pin > 4) {
172 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
173 		goto bad;
174 	}
175 
176 	/*
177 	* Section 6.2.4, `Miscellaneous Functions', says that 255 means
178 	* `unknown' or `no connection' on a PC.  We assume that a device with
179 	* `no connection' either doesn't have an interrupt (in which case the
180 	* pin number should be 0, and would have been noticed above), or
181 	* wasn't configured by the BIOS (in which case we punt, since there's
182 	* no real way we can know how the interrupt lines are mapped in the
183 	* hardware).
184 	*
185 	* XXX
186 	* Since IRQ 0 is only used by the clock, and we can't actually be sure
187 	* that the BIOS did its job, we also recognize that as meaning that
188 	* the BIOS has not configured the device.
189 	*/
190 	if (line == 0 || line == 255) {
191 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
192 		goto bad;
193 	} else {
194 		if (line >= ICU_LEN) {
195 			printf("pci_intr_map: bad interrupt line %d\n", line);
196 			goto bad;
197 		}
198 		if (line == IRQ_SLAVE) {
199 			printf("pci_intr_map: changed line 2 to line 9\n");
200 			line = 9;
201 		}
202 	}
203 
204 	*ihp = line;
205 	return 0;
206 
207 bad:
208 	*ihp = -1;
209 	return 1;
210 }
211 
212 const char *
213 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
214 {
215 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
216 
217 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
218 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
219 
220 	sprintf(irqstr, "irq %d", ih);
221 	return (irqstr);
222 
223 }
224 
225 const struct evcnt *
226 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
227 {
228 
229 	/* XXX for now, no evcnt parent reported */
230 	return NULL;
231 }
232 
233 void *
234 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
235     int (*func)(void *), void *arg)
236 {
237 
238 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
239 		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
240 
241 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
242 }
243 
244 void
245 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
246 {
247 
248 	isa_intr_disestablish(NULL, cookie);
249 }
250 
251 void
252 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
253     int swiz, int *iline)
254 {
255 
256 	(*platform->pci_intr_fixup)(bus, dev, iline);
257 }
258