1 /*	$NetBSD: netwinder_machdep.c,v 1.41 2002/11/03 21:43:33 chris Exp $	*/
2 
3 /*
4  * Copyright (c) 1997,1998 Mark Brinicombe.
5  * Copyright (c) 1997,1998 Causality Limited.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Mark Brinicombe
19  *	for the NetBSD Project.
20  * 4. The name of the company nor the name of the author may be used to
21  *    endorse or promote products derived from this software without specific
22  *    prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * Machine dependant functions for kernel setup for EBSA285 core architecture
37  * using Netwinder firmware
38  *
39  * Created      : 24/11/97
40  */
41 
42 #include "opt_ddb.h"
43 #include "opt_pmap_debug.h"
44 
45 #include "isadma.h"
46 
47 #include <sys/param.h>
48 #include <sys/device.h>
49 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/exec.h>
52 #include <sys/proc.h>
53 #include <sys/msgbuf.h>
54 #include <sys/reboot.h>
55 #include <sys/termios.h>
56 
57 #include <dev/cons.h>
58 
59 #include <machine/db_machdep.h>
60 #include <ddb/db_sym.h>
61 #include <ddb/db_extern.h>
62 
63 #include <arm/arm32/machdep.h>
64 
65 #include <machine/bootconfig.h>
66 #define	_ARM32_BUS_DMA_PRIVATE
67 #include <machine/bus.h>
68 #include <machine/cpu.h>
69 #include <machine/frame.h>
70 #include <machine/intr.h>
71 #include <arm/undefined.h>
72 
73 #include <machine/netwinder_boot.h>
74 #include <arm/footbridge/dc21285mem.h>
75 #include <arm/footbridge/dc21285reg.h>
76 
77 #include "opt_ipkdb.h"
78 
79 #include "isa.h"
80 #if NISA > 0
81 #include <dev/isa/isareg.h>
82 #include <dev/isa/isavar.h>
83 #endif
84 
85 static bus_space_handle_t isa_base = (bus_space_handle_t) DC21285_PCI_IO_VBASE;
86 
87 bs_protos(generic);
88 
89 #define	ISA_GETBYTE(r)		generic_bs_r_1(0, isa_base, (r))
90 #define	ISA_PUTBYTE(r,v)	generic_bs_w_1(0, isa_base, (r), (v))
91 
92 /*
93  * Address to call from cpu_reset() to reset the machine.
94  * This is machine architecture dependant as it varies depending
95  * on where the ROM appears when you turn the MMU off.
96  */
97 static void netwinder_reset(void);
98 u_int cpu_reset_address = (u_int) netwinder_reset;
99 
100 u_int dc21285_fclk = 63750000;
101 
102 /* Define various stack sizes in pages */
103 #define IRQ_STACK_SIZE	1
104 #define ABT_STACK_SIZE	1
105 #ifdef IPKDB
106 #define UND_STACK_SIZE	2
107 #else
108 #define UND_STACK_SIZE	1
109 #endif
110 
111 struct nwbootinfo nwbootinfo;
112 BootConfig bootconfig;		/* Boot config storage */
113 static char bootargs[MAX_BOOT_STRING + 1];
114 char *boot_args = NULL;
115 char *boot_file = NULL;
116 
117 vm_offset_t physical_start;
118 vm_offset_t physical_freestart;
119 vm_offset_t physical_freeend;
120 vm_offset_t physical_end;
121 u_int free_pages;
122 vm_offset_t pagetables_start;
123 int physmem = 0;
124 
125 /*int debug_flags;*/
126 #ifndef PMAP_STATIC_L1S
127 int max_processes = 64;			/* Default number */
128 #endif	/* !PMAP_STATIC_L1S */
129 
130 /* Physical and virtual addresses for some global pages */
131 pv_addr_t systempage;
132 pv_addr_t irqstack;
133 pv_addr_t undstack;
134 pv_addr_t abtstack;
135 pv_addr_t kernelstack;
136 
137 vm_offset_t msgbufphys;
138 
139 extern u_int data_abort_handler_address;
140 extern u_int prefetch_abort_handler_address;
141 extern u_int undefined_handler_address;
142 
143 #ifdef PMAP_DEBUG
144 extern int pmap_debug_level;
145 #endif
146 
147 #define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
148 #define KERNEL_PT_KERNEL	1	/* Page table for mapping kernel */
149 #define KERNEL_PT_VMDATA	2	/* Page tables for mapping kernel VM */
150 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
151 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
152 
153 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
154 
155 struct user *proc0paddr;
156 
157 /* Prototypes */
158 
159 void consinit		__P((void));
160 
161 int fcomcnattach __P((u_int iobase, int rate,tcflag_t cflag));
162 int fcomcndetach __P((void));
163 
164 void process_kernel_args	__P((char *));
165 void data_abort_handler		__P((trapframe_t *frame));
166 void prefetch_abort_handler	__P((trapframe_t *frame));
167 void undefinedinstruction_bounce	__P((trapframe_t *frame));
168 extern void configure		__P((void));
169 extern void parse_mi_bootargs	__P((char *args));
170 extern void dumpsys		__P((void));
171 
172 /* A load of console goo. */
173 #include "vga.h"
174 #if (NVGA > 0)
175 #include <dev/ic/mc6845reg.h>
176 #include <dev/ic/pcdisplayvar.h>
177 #include <dev/ic/vgareg.h>
178 #include <dev/ic/vgavar.h>
179 #endif
180 
181 #include "pckbc.h"
182 #if (NPCKBC > 0)
183 #include <dev/ic/i8042reg.h>
184 #include <dev/ic/pckbcvar.h>
185 #endif
186 
187 #include "com.h"
188 #if (NCOM > 0)
189 #include <dev/ic/comreg.h>
190 #include <dev/ic/comvar.h>
191 #ifndef CONCOMADDR
192 #define CONCOMADDR 0x3f8
193 #endif
194 #endif
195 
196 #ifndef CONSDEVNAME
197 #define CONSDEVNAME "com"
198 #endif
199 
200 #define CONSPEED B115200
201 #ifndef CONSPEED
202 #define CONSPEED B9600	/* TTYDEF_SPEED */
203 #endif
204 #ifndef CONMODE
205 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
206 #endif
207 
208 int comcnspeed = CONSPEED;
209 int comcnmode = CONMODE;
210 
211 extern struct consdev kcomcons;
212 static void kcomcnputc(dev_t, int);
213 
214 /*
215  * void cpu_reboot(int howto, char *bootstr)
216  *
217  * Reboots the system
218  *
219  * Deal with any syncing, unmounting, dumping and shutdown hooks,
220  * then reset the CPU.
221  */
222 
223 void
224 cpu_reboot(howto, bootstr)
225 	int howto;
226 	char *bootstr;
227 {
228 #ifdef DIAGNOSTIC
229 	/* info */
230 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
231 #endif
232 
233 	/*
234 	 * If we are still cold then hit the air brakes
235 	 * and crash to earth fast
236 	 */
237 	if (cold) {
238 		doshutdownhooks();
239 		printf("The operating system has halted.\n");
240 		printf("Please press any key to reboot.\n\n");
241 		cngetc();
242 		printf("rebooting...\n");
243 		cpu_reset();
244 		/*NOTREACHED*/
245 	}
246 
247 	/* Disable console buffering */
248 /*	cnpollc(1);*/
249 
250 	/*
251 	 * If RB_NOSYNC was not specified sync the discs.
252 	 * Note: Unless cold is set to 1 here, syslogd will die during the unmount.
253 	 * It looks like syslogd is getting woken up only to find that it cannot
254 	 * page part of the binary in as the filesystem has been unmounted.
255 	 */
256 	if (!(howto & RB_NOSYNC))
257 		bootsync();
258 
259 	/* Say NO to interrupts */
260 	splhigh();
261 
262 	/* Do a dump if requested. */
263 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
264 		dumpsys();
265 
266 	/* Run any shutdown hooks */
267 	doshutdownhooks();
268 
269 	/* Make sure IRQ's are disabled */
270 	IRQdisable;
271 
272 	if (howto & RB_HALT) {
273 		printf("The operating system has halted.\n");
274 		printf("Please press any key to reboot.\n\n");
275 		cngetc();
276 	}
277 
278 	printf("rebooting...\n");
279 	cpu_reset();
280 	/*NOTREACHED*/
281 }
282 
283 static void
284 netwinder_reset(void)
285 {
286 	ISA_PUTBYTE(0x370, 0x07); 	/* Select Logical Dev 7 (GPIO) */
287 	ISA_PUTBYTE(0x371, 0x07);
288 	ISA_PUTBYTE(0x370, 0xe6);	/* Select GP16 Control Reg */
289 	ISA_PUTBYTE(0x371, 0x00);	/* Make GP16 an output */
290 	ISA_PUTBYTE(0x338, 0xc4);	/* Set GP17/GP16 & GP12 */
291 }
292 
293 /*
294  * Mapping table for core kernel memory. This memory is mapped at init
295  * time with section mappings.
296  */
297 struct l1_sec_map {
298 	vm_offset_t	va;
299 	vm_offset_t	pa;
300 	vm_size_t	size;
301 	vm_prot_t	prot;
302 	int		cache;
303 } l1_sec_table[] = {
304 	/* Map 1MB for CSR space */
305 	{ DC21285_ARMCSR_VBASE,			DC21285_ARMCSR_BASE,
306 	    DC21285_ARMCSR_VSIZE,		VM_PROT_READ|VM_PROT_WRITE,
307 	    PTE_NOCACHE },
308 
309 	/* Map 1MB for fast cache cleaning space */
310 	{ DC21285_CACHE_FLUSH_VBASE,		DC21285_SA_CACHE_FLUSH_BASE,
311 	    DC21285_CACHE_FLUSH_VSIZE,		VM_PROT_READ|VM_PROT_WRITE,
312 	    PTE_CACHE },
313 
314 	/* Map 1MB for PCI IO space */
315 	{ DC21285_PCI_IO_VBASE,			DC21285_PCI_IO_BASE,
316 	    DC21285_PCI_IO_VSIZE,		VM_PROT_READ|VM_PROT_WRITE,
317 	    PTE_NOCACHE },
318 
319 	/* Map 1MB for PCI IACK space */
320 	{ DC21285_PCI_IACK_VBASE,		DC21285_PCI_IACK_SPECIAL,
321 	    DC21285_PCI_IACK_VSIZE,		VM_PROT_READ|VM_PROT_WRITE,
322 	    PTE_NOCACHE },
323 
324 	/* Map 16MB of type 1 PCI config access */
325 	{ DC21285_PCI_TYPE_1_CONFIG_VBASE,	DC21285_PCI_TYPE_1_CONFIG,
326 	    DC21285_PCI_TYPE_1_CONFIG_VSIZE,	VM_PROT_READ|VM_PROT_WRITE,
327 	    PTE_NOCACHE },
328 
329 	/* Map 16MB of type 0 PCI config access */
330 	{ DC21285_PCI_TYPE_0_CONFIG_VBASE,	DC21285_PCI_TYPE_0_CONFIG,
331 	    DC21285_PCI_TYPE_0_CONFIG_VSIZE,	VM_PROT_READ|VM_PROT_WRITE,
332 	    PTE_NOCACHE },
333 
334 	/* Map 1MB of 32 bit PCI address space for ISA MEM accesses via PCI */
335 	{ DC21285_PCI_ISA_MEM_VBASE,		DC21285_PCI_MEM_BASE,
336 	    DC21285_PCI_ISA_MEM_VSIZE,		VM_PROT_READ|VM_PROT_WRITE,
337 	    PTE_NOCACHE },
338 
339 	{ 0, 0, 0, 0, 0 }
340 };
341 
342 /*
343  * u_int initarm(...);
344  *
345  * Initial entry point on startup. This gets called before main() is
346  * entered.
347  * It should be responsible for setting up everything that must be
348  * in place when main is called.
349  * This includes
350  *   Taking a copy of the boot configuration structure.
351  *   Initialising the physical console so characters can be printed.
352  *   Setting up page tables for the kernel
353  *   Relocating the kernel to the bottom of physical memory
354  */
355 
356 u_int
357 initarm(void *arg)
358 {
359 	int loop;
360 	int loop1;
361 	u_int l1pagetable;
362 	extern char _end[];
363 	pv_addr_t kernel_l1pt;
364 	pv_addr_t kernel_ptpt;
365 
366 	/*
367 	 * Set up a diagnostic console so we can see what's going
368 	 * on.
369 	 */
370 	cn_tab = &kcomcons;
371 
372 	/* Talk to the user */
373 	printf("\nNetBSD/netwinder booting ...\n");
374 
375 	/*
376 	 * Heads up ... Setup the CPU / MMU / TLB functions
377 	 */
378 	if (set_cpufuncs())
379 		panic("cpu not recognized!");
380 
381 	/*
382 	 * We are currently running with the MMU enabled and the
383 	 * entire address space mapped VA==PA, except for the
384 	 * first 64MB of RAM is also double-mapped at 0xf0000000.
385 	 * There is an L1 page table at 0x00008000.
386 	 *
387 	 * We also have the 21285's PCI I/O space mapped where
388 	 * we expect it.
389 	 */
390 
391 	printf("initarm: Configuring system ...\n");
392 
393 	/*
394 	 * Copy out the boot info passed by the firmware.  Note that
395 	 * early versions of NeTTrom fill this in with bogus values,
396 	 * so we need to sanity check it.
397 	 */
398 	memcpy(&nwbootinfo, (caddr_t)(KERNEL_BASE + 0x100),
399 	    sizeof(nwbootinfo));
400 #ifdef VERBOSE_INIT_ARM
401 	printf("NeTTrom boot info:\n");
402 	printf("\tpage size = 0x%08lx\n", nwbootinfo.bi_pagesize);
403 	printf("\tnpages = %ld (0x%08lx)\n", nwbootinfo.bi_nrpages,
404 	    nwbootinfo.bi_nrpages);
405 	printf("\trootdev = 0x%08lx\n", nwbootinfo.bi_rootdev);
406 	printf("\tcmdline = %s\n", nwbootinfo.bi_cmdline);
407 #endif
408 	if (nwbootinfo.bi_nrpages != 0x02000 &&
409 	    nwbootinfo.bi_nrpages != 0x04000 &&
410 	    nwbootinfo.bi_nrpages != 0x08000 &&
411 	    nwbootinfo.bi_nrpages != 0x10000) {
412 		nwbootinfo.bi_pagesize = 0xdeadbeef;
413 		nwbootinfo.bi_nrpages = 0x01000;	/* 16MB */
414 		nwbootinfo.bi_rootdev = 0;
415 	}
416 
417 	/* Fake bootconfig structure for the benefit of pmap.c */
418 	/* XXX must make the memory description h/w independant */
419 	bootconfig.dramblocks = 1;
420 	bootconfig.dram[0].address = 0;
421 	bootconfig.dram[0].pages = nwbootinfo.bi_nrpages;
422 
423 	/*
424 	 * Set up the variables that define the availablilty of
425 	 * physical memory.
426 	 *
427 	 * Since the NetWinder NeTTrom doesn't load ELF symbols
428 	 * for us, we can safely assume that everything after end[]
429 	 * is free.  We start there and allocate upwards.
430 	 */
431 	physical_start = bootconfig.dram[0].address;
432 	physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
433 
434 	physical_freestart = ((((vaddr_t) _end) + PGOFSET) & ~PGOFSET) -
435 	    KERNEL_BASE;
436 	physical_freeend = physical_end;
437 	free_pages = (physical_freeend - physical_freestart) / NBPG;
438 
439 #ifdef VERBOSE_INIT_ARM
440 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
441 	       physical_freestart, free_pages, free_pages);
442 #endif
443 
444 	physmem = (physical_end - physical_start) / NBPG;
445 
446 	/* Tell the user about the memory */
447 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
448 	    physical_start, physical_end - 1);
449 
450 	/*
451 	 * Okay, we need to allocate some fixed page tables to get the
452 	 * kernel going.  We allocate one page directory and a number
453 	 * of page tables and store the physical addresses in the
454 	 * kernel_pt_table array.
455 	 *
456 	 * The kernel page directory must be on a 16K boundary.  The page
457 	 * tables must be on 4K boundaries.  What we do is allocate the
458 	 * page directory on the first 16K boundary that we encounter,
459 	 * and the page tables on 4K boundaries otherwise.  Since we
460 	 * allocate at least 3 L2 page tables, we are guaranteed to
461 	 * encounter at least one 16K aligned region.
462 	 */
463 
464 #ifdef VERBOSE_INIT_ARM
465 	printf("Allocating page tables\n");
466 #endif
467 
468 	/* Define a macro to simplify memory allocation */
469 #define	valloc_pages(var, np)			\
470 	alloc_pages((var).pv_pa, (np));		\
471 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
472 
473 #define alloc_pages(var, np)			\
474 	(var) = physical_freestart;		\
475 	physical_freestart += ((np) * NBPG);	\
476 	free_pages -= (np);			\
477 	memset((char *)(var), 0, ((np) * NBPG));
478 
479 	loop1 = 0;
480 	kernel_l1pt.pv_pa = 0;
481 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
482 		/* Are we 16KB aligned for an L1 ? */
483 		if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0
484 		    && kernel_l1pt.pv_pa == 0) {
485 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
486 		} else {
487 			alloc_pages(kernel_pt_table[loop1].pv_pa,
488 			    L2_TABLE_SIZE / NBPG);
489 			kernel_pt_table[loop1].pv_va =
490 			    kernel_pt_table[loop1].pv_pa;
491 			++loop1;
492 		}
493 	}
494 
495 	/* This should never be able to happen but better confirm that. */
496 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
497 		panic("initarm: Failed to align the kernel page directory");
498 
499 	/*
500 	 * Allocate a page for the system page mapped to V0x00000000
501 	 * This page will just contain the system vectors and can be
502 	 * shared by all processes.
503 	 */
504 	alloc_pages(systempage.pv_pa, 1);
505 
506 	/* Allocate a page for the page table to map kernel page tables*/
507 	valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
508 
509 	/* Allocate stacks for all modes */
510 	valloc_pages(irqstack, IRQ_STACK_SIZE);
511 	valloc_pages(abtstack, ABT_STACK_SIZE);
512 	valloc_pages(undstack, UND_STACK_SIZE);
513 	valloc_pages(kernelstack, UPAGES);
514 
515 #ifdef VERBOSE_INIT_ARM
516 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
517 	    irqstack.pv_va);
518 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
519 	    abtstack.pv_va);
520 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
521 	    undstack.pv_va);
522 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
523 	    kernelstack.pv_va);
524 #endif
525 
526 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
527 
528 	/*
529 	 * Ok we have allocated physical pages for the primary kernel
530 	 * page tables
531 	 */
532 
533 #ifdef VERBOSE_INIT_ARM
534 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
535 #endif
536 
537 	/*
538 	 * Now we start consturction of the L1 page table
539 	 * We start by mapping the L2 page tables into the L1.
540 	 * This means that we can replace L1 mappings later on if necessary
541 	 */
542 	l1pagetable = kernel_l1pt.pv_pa;
543 
544 	/* Map the L2 pages tables in the L1 page table */
545 	pmap_link_l2pt(l1pagetable, 0x00000000,
546 	    &kernel_pt_table[KERNEL_PT_SYS]);
547 	pmap_link_l2pt(l1pagetable, KERNEL_BASE,
548 	    &kernel_pt_table[KERNEL_PT_KERNEL]);
549 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
550 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
551 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
552 	pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
553 
554 	/* update the top of the kernel VM */
555 	pmap_curmaxkvaddr =
556 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
557 
558 #ifdef VERBOSE_INIT_ARM
559 	printf("Mapping kernel\n");
560 #endif
561 
562 	/* Now we fill in the L2 pagetable for the kernel static code/data */
563 	{
564 		/*
565 		 * The kernel starts in the first 1MB of RAM, and we'd
566 		 * like to use a section mapping for text, so we'll just
567 		 * map from KERNEL_BASE to etext[] to _end[].
568 		 */
569 
570 		extern char etext[];
571 		size_t textsize = (uintptr_t) etext - KERNEL_BASE;
572 		size_t totalsize = (uintptr_t) _end - KERNEL_BASE;
573 		u_int logical;
574 
575 		textsize = (textsize + PGOFSET) & ~PGOFSET;
576 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
577 
578 		textsize = textsize & ~PGOFSET;
579 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
580 
581 		logical = 0;		/* offset into RAM */
582 
583 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
584 		    physical_start + logical, textsize,
585 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
586 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
587 		    physical_start + logical, totalsize - textsize,
588 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
589 	}
590 
591 #ifdef VERBOSE_INIT_ARM
592 	printf("Constructing L2 page tables\n");
593 #endif
594 
595 	/* Map the stack pages */
596 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
597 	    IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
598 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
599 	    ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
600 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
601 	    UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
602 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
603 	    UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
604 
605 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
606 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
607 
608 	/* Map the page table that maps the kernel pages */
609 	pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
610 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
611 
612 	/*
613 	 * Map entries in the page table used to map PTE's
614 	 * Basically every kernel page table gets mapped here
615 	 */
616 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
617 	pmap_map_entry(l1pagetable,
618 	    PTE_BASE + (KERNEL_BASE >> (PGSHIFT-2)),
619 	    kernel_pt_table[KERNEL_PT_KERNEL].pv_pa,
620 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
621 	pmap_map_entry(l1pagetable,
622 	    PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
623 	    kernel_ptpt.pv_pa,
624 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
625 	pmap_map_entry(l1pagetable,
626 	    PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
627 	    kernel_pt_table[KERNEL_PT_SYS].pv_pa,
628 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
629 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
630 		pmap_map_entry(l1pagetable,
631 		    PTE_BASE + ((KERNEL_VM_BASE +
632 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
633 		    kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
634 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
635 
636 	/* Map the vector page. */
637 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
638 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
639 
640 	/*
641 	 * Map devices we can map w/ section mappings.
642 	 */
643 	loop = 0;
644 	while (l1_sec_table[loop].size) {
645 		vm_size_t sz;
646 
647 #ifdef VERBOSE_INIT_ARM
648 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
649 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
650 		    l1_sec_table[loop].va);
651 #endif
652 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
653 			pmap_map_section(l1pagetable,
654 			    l1_sec_table[loop].va + sz,
655 			    l1_sec_table[loop].pa + sz,
656 			    l1_sec_table[loop].prot,
657 			    l1_sec_table[loop].cache);
658 		++loop;
659 	}
660 
661 	/*
662 	 * Now we have the real page tables in place so we can switch to them.
663 	 * Once this is done we will be running with the REAL kernel page
664 	 * tables.
665 	 */
666 
667 	/* Switch tables */
668 #ifdef VERBOSE_INIT_ARM
669 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
670 	       physical_freestart, free_pages, free_pages);
671 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
672 #endif
673 
674 	setttb(kernel_l1pt.pv_pa);
675 
676 #ifdef VERBOSE_INIT_ARM
677 	printf("done!\n");
678 #endif
679 
680 	/*
681 	 * XXX this should only be done in main() but it useful to
682 	 * have output earlier ...
683 	 */
684 	consinit();
685 
686 #ifdef VERBOSE_INIT_ARM
687 	printf("bootstrap done.\n");
688 #endif
689 
690 	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
691 
692 	/*
693 	 * Pages were allocated during the secondary bootstrap for the
694 	 * stacks for different CPU modes.
695 	 * We must now set the r13 registers in the different CPU modes to
696 	 * point to these stacks.
697 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
698 	 * of the stack memory.
699 	 */
700 	printf("init subsystems: stacks ");
701 
702 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
703 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
704 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
705 
706 	/*
707 	 * Well we should set a data abort handler.
708 	 * Once things get going this will change as we will need a proper
709 	 * handler.
710 	 * Until then we will use a handler that just panics but tells us
711 	 * why.
712 	 * Initialisation of the vectors will just panic on a data abort.
713 	 * This just fills in a slighly better one.
714 	 */
715 	printf("vectors ");
716 	data_abort_handler_address = (u_int)data_abort_handler;
717 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
718 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
719 
720 	/* Initialise the undefined instruction handlers */
721 	printf("undefined ");
722 	undefined_init();
723 
724 	/* Load memory into UVM. */
725 	printf("page ");
726 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
727 
728 	/* XXX Always one RAM block -- nuke the loop. */
729 	for (loop = 0; loop < bootconfig.dramblocks; loop++) {
730 		paddr_t start = (paddr_t)bootconfig.dram[loop].address;
731 		paddr_t end = start + (bootconfig.dram[loop].pages * NBPG);
732 #if NISADMA > 0
733 		paddr_t istart, isize;
734 		extern struct arm32_dma_range *footbridge_isa_dma_ranges;
735 		extern int footbridge_isa_dma_nranges;
736 #endif
737 
738 		if (start < physical_freestart)
739 			start = physical_freestart;
740 		if (end > physical_freeend)
741 			end = physical_freeend;
742 
743 #if 0
744 		printf("%d: %lx -> %lx\n", loop, start, end - 1);
745 #endif
746 
747 #if NISADMA > 0
748 		if (arm32_dma_range_intersect(footbridge_isa_dma_ranges,
749 					      footbridge_isa_dma_nranges,
750 					      start, end - start,
751 					      &istart, &isize)) {
752 			/*
753 			 * Place the pages that intersect with the
754 			 * ISA DMA range onto the ISA DMA free list.
755 			 */
756 #if 0
757 			printf("    ISADMA 0x%lx -> 0x%lx\n", istart,
758 			    istart + isize - 1);
759 #endif
760 			uvm_page_physload(atop(istart),
761 			    atop(istart + isize), atop(istart),
762 			    atop(istart + isize), VM_FREELIST_ISADMA);
763 
764 			/*
765 			 * Load the pieces that come before the
766 			 * intersection onto the default free list.
767 			 */
768 			if (start < istart) {
769 #if 0
770 				printf("    BEFORE 0x%lx -> 0x%lx\n",
771 				    start, istart - 1);
772 #endif
773 				uvm_page_physload(atop(start),
774 				    atop(istart), atop(start),
775 				    atop(istart), VM_FREELIST_DEFAULT);
776 			}
777 
778 			/*
779 			 * Load the pieces that come after the
780 			 * intersection onto the default free list.
781 			 */
782 			if ((istart + isize) < end) {
783 #if 0
784 				printf("     AFTER 0x%lx -> 0x%lx\n",
785 				    (istart + isize), end - 1);
786 #endif
787 				uvm_page_physload(atop(istart + isize),
788 				    atop(end), atop(istart + isize),
789 				    atop(end), VM_FREELIST_DEFAULT);
790 			}
791 		} else {
792 			uvm_page_physload(atop(start), atop(end),
793 			    atop(start), atop(end), VM_FREELIST_DEFAULT);
794 		}
795 #else /* NISADMA > 0 */
796 		uvm_page_physload(atop(start), atop(end),
797 		    atop(start), atop(end), VM_FREELIST_DEFAULT);
798 #endif /* NISADMA > 0 */
799 	}
800 
801 	/* Boot strap pmap telling it where the kernel page table is */
802 	printf("pmap ");
803 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
804 
805 	/* Setup the IRQ system */
806 	printf("irq ");
807 	footbridge_intr_init();
808 	printf("done.\n");
809 
810 	/*
811 	 * Warn the user if the bootinfo was bogus.  We already
812 	 * faked up some safe values.
813 	 */
814 	if (nwbootinfo.bi_pagesize == 0xdeadbeef)
815 		printf("WARNING: NeTTrom boot info corrupt\n");
816 
817 #ifdef IPKDB
818 	/* Initialise ipkdb */
819 	ipkdb_init();
820 	if (boothowto & RB_KDB)
821 		ipkdb_connect(0);
822 #endif
823 
824 #ifdef DDB
825 	db_machine_init();
826 
827 	/* Firmware doesn't load symbols. */
828 	ddb_init(0, NULL, NULL);
829 
830 	if (boothowto & RB_KDB)
831 		Debugger();
832 #endif
833 
834 	/* We return the new stack pointer address */
835 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
836 }
837 
838 void
839 process_kernel_args(args)
840 	char *args;
841 {
842 
843 	boothowto = 0;
844 
845 	/* Make a local copy of the bootargs */
846 	strncpy(bootargs, args, MAX_BOOT_STRING);
847 
848 	args = bootargs;
849 	boot_file = bootargs;
850 
851 	/* Skip the kernel image filename */
852 	while (*args != ' ' && *args != 0)
853 		++args;
854 
855 	if (*args != 0)
856 		*args++ = 0;
857 
858 	while (*args == ' ')
859 		++args;
860 
861 	boot_args = args;
862 
863 	printf("bootfile: %s\n", boot_file);
864 	printf("bootargs: %s\n", boot_args);
865 
866 	parse_mi_bootargs(boot_args);
867 }
868 
869 extern struct bus_space footbridge_pci_io_bs_tag;
870 extern struct bus_space footbridge_pci_mem_bs_tag;
871 void footbridge_pci_bs_tag_init __P((void));
872 
873 void
874 consinit(void)
875 {
876 	static int consinit_called = 0;
877 	char *console = CONSDEVNAME;
878 
879 	if (consinit_called != 0)
880 		return;
881 
882 	consinit_called = 1;
883 
884 #if NISA > 0
885 	/* Initialise the ISA subsystem early ... */
886 	isa_footbridge_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
887 #endif
888 
889 	footbridge_pci_bs_tag_init();
890 
891 	if (strncmp(console, "vga", 3) == 0) {
892 #if (NVGA > 0)
893 		vga_cnattach(&footbridge_pci_io_bs_tag,
894 		    &footbridge_pci_mem_bs_tag, - 1, 0);
895 #if (NPCKBC > 0)
896 		pckbc_cnattach(&isa_io_bs_tag, IO_KBD, KBCMDP, PCKBC_KBD_SLOT);
897 #endif	/* NPCKBC */
898 #else
899 		panic("vga console not configured");
900 #endif	/* NVGA */
901 	} else {
902 #if (NCOM > 0)
903 		if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
904 		    COM_FREQ, comcnmode))
905 			panic("can't init serial console @%x", CONCOMADDR);
906 #else
907 			panic("serial console @%x not configured", CONCOMADDR);
908 #endif
909 	}
910 }
911 
912 static bus_space_handle_t kcom_base = (bus_space_handle_t) (DC21285_PCI_IO_VBASE + CONCOMADDR);
913 
914 #define	KCOM_GETBYTE(r)		generic_bs_r_1(0, kcom_base, (r))
915 #define	KCOM_PUTBYTE(r,v)	generic_bs_w_1(0, kcom_base, (r), (v))
916 
917 static int
918 kcomcngetc(dev_t dev)
919 {
920 	int stat, c;
921 
922 	/* block until a character becomes available */
923 	while (!ISSET(stat = KCOM_GETBYTE(com_lsr), LSR_RXRDY))
924 		;
925 
926 	c = KCOM_GETBYTE(com_data);
927 	stat = KCOM_GETBYTE(com_iir);
928 	return c;
929 }
930 
931 /*
932  * Console kernel output character routine.
933  */
934 static void
935 kcomcnputc(dev_t dev, int c)
936 {
937 	int timo;
938 
939 	/* wait for any pending transmission to finish */
940 	timo = 150000;
941 	while (!ISSET(KCOM_GETBYTE(com_lsr), LSR_TXRDY) && --timo)
942 		continue;
943 
944 	KCOM_PUTBYTE(com_data, c);
945 
946 	/* wait for this transmission to complete */
947 	timo = 1500000;
948 	while (!ISSET(KCOM_GETBYTE(com_lsr), LSR_TXRDY) && --timo)
949 		continue;
950 }
951 
952 static void
953 kcomcnpollc(dev_t dev, int on)
954 {
955 }
956 
957 struct consdev kcomcons = {
958 	NULL, NULL, kcomcngetc, kcomcnputc, kcomcnpollc, NULL,
959 	NODEV, CN_NORMAL
960 };
961