xref: /netbsd/sys/arch/newsmips/apbus/if_tlp_ap.c (revision bf9ec67e)
1 /*	$NetBSD: if_tlp_ap.c,v 1.2 2001/11/14 18:15:30 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Atsushi Onoe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/errno.h>
42 #include <sys/ioctl.h>
43 #include <sys/malloc.h>
44 #include <sys/socket.h>
45 #include <sys/syslog.h>
46 #include <sys/systm.h>
47 
48 #include <net/if.h>
49 #include <net/if_dl.h>
50 #include <net/if_media.h>
51 #include <net/if_ether.h>
52 
53 #include <machine/bus.h>
54 #include <machine/intr.h>
55 
56 #include <mips/cache.h>
57 
58 #include <dev/mii/miivar.h>
59 #include <dev/mii/mii_bitbang.h>
60 
61 #include <dev/ic/tulipreg.h>
62 #include <dev/ic/tulipvar.h>
63 
64 #include <newsmips/apbus/apbusvar.h>
65 
66 #define	TLP_AP_ROM	0x00000000	/* AProm entry address */
67 #define	TLP_AP_CFG	0x00040000	/* PCI configuration registers */
68 #define		TLP_AP_CFG_CFID	0x00		/* Identification */
69 #define		TLP_AP_CFG_CFCS	0x04		/* Command and status */
70 #define		TLP_AP_CFG_CFRV	0x08		/* Revision */
71 #define		TLP_AP_CFG_CFLT	0x0c		/* Latency timer */
72 #define		TLP_AP_CFG_CBIO	0x10		/* Base I/O address */
73 #define		TLP_AP_CFG_CBMA	0x14		/* Base memory address */
74 #define		TLP_AP_CFG_CFIT	0x3c		/* Interrupt */
75 #define	TLP_AP_CSR	0x00080000	/* CSR base address */
76 #define	TLP_AP_RST	0x00100000	/* Board Reset */
77 
78 
79 extern void tlp_idle __P((struct tulip_softc *, u_int32_t));
80 
81 struct tulip_ap_softc {
82 	struct tulip_softc sc_tulip;	/* real Tulip softc */
83 	bus_space_tag_t sc_cfst;
84 	bus_space_handle_t sc_cfsh;
85 };
86 
87 static int	tlp_ap_match __P((struct device *, struct cfdata *, void *));
88 static void	tlp_ap_attach __P((struct device *, struct device *, void *));
89 
90 struct cfattach tlp_ap_ca = {
91 	sizeof(struct tulip_ap_softc), tlp_ap_match, tlp_ap_attach
92 };
93 
94 static void tlp_ap_preinit __P((struct tulip_softc *));
95 static void tlp_ap_tmsw_init __P((struct tulip_softc *));
96 static void tlp_ap_getmedia __P((struct tulip_softc *, struct ifmediareq *));
97 static int tlp_ap_setmedia __P((struct tulip_softc *));
98 
99 const struct tulip_mediasw tlp_ap_mediasw = {
100 	tlp_ap_tmsw_init, tlp_ap_getmedia, tlp_ap_setmedia
101 };
102 
103 static int
104 tlp_ap_match(parent, cf, aux)
105 	struct device *parent;
106 	struct cfdata *cf;
107 	void *aux;
108 {
109 	struct apbus_attach_args *apa = aux;
110 
111 	if (strcmp(apa->apa_name, "cbasetx") != 0)
112 		return 0;
113 
114 	return 1;
115 }
116 
117 /*
118  * Install interface into kernel networking data structures
119  */
120 static void
121 tlp_ap_attach(parent, self, aux)
122 	struct device *parent, *self;
123 	void   *aux;
124 {
125 	struct tulip_ap_softc *psc = (void *) self;
126 	struct tulip_softc *sc = &psc->sc_tulip;
127 	struct apbus_attach_args *apa = aux;
128 	u_int8_t enaddr[ETHER_ADDR_LEN];
129 	u_int intrmask;
130 	int i;
131 
132 	printf(" slot%d addr 0x%lx", apa->apa_slotno, apa->apa_hwbase);
133 
134 	/* PCI configuration register */
135 	psc->sc_cfst = 0;
136 	psc->sc_cfsh = apa->apa_hwbase + TLP_AP_CFG;
137 	sc->sc_devno = apa->apa_slotno;
138 	sc->sc_rev = bus_space_read_4(psc->sc_cfst, psc->sc_cfsh,
139 	    TLP_AP_CFG_CFRV);
140 	switch (bus_space_read_4(psc->sc_cfst, psc->sc_cfsh, TLP_AP_CFG_CFID)) {
141 	case 0x00091011:
142 		if (sc->sc_rev >= 0x20)
143 			sc->sc_chip = TULIP_CHIP_21140A;
144 		else
145 			sc->sc_chip = TULIP_CHIP_21140;
146 		break;
147 	default:
148 		printf(": unable to handle your board\n");
149 		return;
150 	}
151 
152 	printf(": %s Ethernet, pass %d.%d\n",
153 	    tlp_chip_names[sc->sc_chip],
154 	    (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
155 
156 	/* CSR */
157 	sc->sc_st = 0;
158 	sc->sc_sh = apa->apa_hwbase + TLP_AP_CSR;
159 	sc->sc_dmat = apbus_dmatag_init(apa);
160 	if (sc->sc_dmat == NULL) {
161 		printf("%s: cannot allocate memory\n", sc->sc_dev.dv_xname);
162 		return;
163 	}
164 
165 	/*
166 	 * Initialize bus specific parameters.
167 	 */
168 	if (mips_sdcache_line_size > 0)
169 		sc->sc_cacheline = mips_sdcache_line_size / 4;
170 	else if (mips_pdcache_line_size > 0)
171 		sc->sc_cacheline = mips_pdcache_line_size / 4;
172 	else
173 		sc->sc_cacheline = 4;
174 	sc->sc_maxburst = sc->sc_cacheline;		/* XXX */
175 	sc->sc_regshift = 3;
176 	sc->sc_flags |= TULIPF_DBO | TULIPF_BLE;	/* Big Endian BUS */
177 	sc->sc_flags |= TULIPF_ENABLED;			/* No Power Mgmt */
178 
179 	/*
180 	 * Reset hardware.
181 	 */
182 	bus_space_write_4(0, apa->apa_hwbase + TLP_AP_RST, 0, 1);
183 	delay(100);
184 
185 	/*
186 	 * Initialize PCI configuration register
187 	 */
188 	bus_space_write_4(psc->sc_cfst, psc->sc_cfsh,
189 	    TLP_AP_CFG_CFCS, 0x00000005);	/* Master, IO */
190 	bus_space_write_4(psc->sc_cfst, psc->sc_cfsh,
191 	    TLP_AP_CFG_CFLT, 0x00000100);
192 	bus_space_write_4(psc->sc_cfst, psc->sc_cfsh,
193 	    TLP_AP_CFG_CBIO, MIPS_KSEG1_TO_PHYS(sc->sc_sh));
194 	bus_space_write_4(psc->sc_cfst, psc->sc_cfsh,
195 	    TLP_AP_CFG_CFIT, 0x00000101);
196 
197 	/*
198 	 * Initialize general purpose port register.
199 	 */
200 	TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xc0);	/* read */
201 	TULIP_WRITE(sc, CSR_GPP, 0x40);			/* dipsw port on */
202 	i = TULIP_READ(sc, CSR_GPP) & GPP_MD;		/* dipsw contents */
203 	TULIP_WRITE(sc, CSR_GPP, 0xc0);			/* dipsw port off */
204 	TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xcf);	/* read write */
205 	if (sc->sc_maxburst == 16) {
206 		TULIP_WRITE(sc, CSR_GPP, 0x8f);		/* 16word burst */
207 		TULIP_WRITE(sc, CSR_GPP, 0xcf);
208 	} else {
209 		TULIP_WRITE(sc, CSR_GPP, 0x8e);		/* 8word burst */
210 		TULIP_WRITE(sc, CSR_GPP, 0xce);
211 	}
212 	TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xcf);	/* read write */
213 	TULIP_WRITE(sc, CSR_GPP, 0xc3);			/* mask abort/dma err */
214 	TULIP_WRITE(sc, CSR_GPP, 0xcf);			/* mask abort/dma err */
215 
216 	if (tlp_read_srom(sc) == 0) {
217 		printf("%s: srom read failed\n", sc->sc_dev.dv_xname);
218 		free(sc->sc_dmat, M_DEVBUF);
219 		return;
220 	}
221 	for (i = 0; i < ETHER_ADDR_LEN; i++)
222 		enaddr[i] = sc->sc_srom[0x11 + i * 2];
223 
224 	sc->sc_mediasw = &tlp_ap_mediasw;
225 
226 	/*
227 	 * Finish off the attach.
228 	 */
229 	tlp_attach(sc, enaddr);
230 
231 	intrmask = SLOTTOMASK(apa->apa_slotno);
232 	apbus_intr_establish(0, /* interrupt level (0 or 1) */
233 			     intrmask,
234 			     0, /* priority */
235 			     tlp_intr, sc, apa->apa_name, apa->apa_ctlnum);
236 }
237 
238 static void
239 tlp_ap_preinit(sc)
240 	struct tulip_softc *sc;
241 {
242 
243 	sc->sc_opmode |= OPMODE_MBO | OPMODE_SCR | OPMODE_PCS | OPMODE_HBD |
244 	    OPMODE_PS;
245 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
246 }
247 
248 static void
249 tlp_ap_tmsw_init(sc)
250 	struct tulip_softc *sc;
251 {
252 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
253 
254 	sc->sc_preinit = tlp_ap_preinit;
255 
256 	sc->sc_mii.mii_ifp = ifp;
257 	sc->sc_mii.mii_readreg = NULL;
258 	sc->sc_mii.mii_writereg = NULL;
259 	sc->sc_mii.mii_statchg = sc->sc_statchg;
260 	ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
261 	    tlp_mediastatus);
262 	ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX, 0, NULL);
263 	ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX|IFM_FDX, 0,
264 	    NULL);
265 	ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX);
266 }
267 
268 static void
269 tlp_ap_getmedia(sc, ifmr)
270 	struct tulip_softc *sc;
271 	struct ifmediareq *ifmr;
272 {
273 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
274 
275 	ifmr->ifm_status = IFM_AVALID;
276 	if (ifp->if_flags & IFF_RUNNING)
277 		ifmr->ifm_status |= IFM_ACTIVE;
278 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
279 }
280 
281 static int
282 tlp_ap_setmedia(sc)
283 	struct tulip_softc *sc;
284 {
285 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
286 
287 	sc->sc_mii.mii_media_active = sc->sc_mii.mii_media.ifm_cur->ifm_media;
288 
289 	if (ifp->if_flags & IFF_UP)
290 		tlp_idle(sc, OPMODE_ST|OPMODE_SR);
291 	if (sc->sc_mii.mii_media_active & IFM_FDX)
292 		sc->sc_opmode |= OPMODE_FD;
293 	else
294 		sc->sc_opmode &= ~OPMODE_FD;
295 	if (ifp->if_flags & IFF_UP)
296 		TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
297 	return (0);
298 }
299