1 /* $NetBSD: zs.c,v 1.12 2000/04/14 10:11:06 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include "opt_ddb.h" 48 49 #include <sys/param.h> 50 #include <sys/device.h> 51 #include <sys/tty.h> 52 #include <sys/systm.h> 53 54 #include <machine/adrsmap.h> 55 #include <machine/cpu.h> 56 #include <machine/z8530var.h> 57 58 #include <dev/ic/z8530reg.h> 59 60 #define ZS_DELAY() (*zs_delay)() 61 62 int zs_print __P((void *, const char *name)); 63 int zshard __P((void *)); 64 void zssoft __P((void *)); 65 int zs_get_speed __P((struct zs_chanstate *)); 66 void Debugger __P((void)); 67 void (*zs_delay) __P((void)); 68 69 extern struct cfdriver zsc_cd; 70 71 /* 72 * Some warts needed by z8530tty.c - 73 * The default parity REALLY needs to be the same as the PROM uses, 74 * or you can not see messages done with printf during boot-up... 75 */ 76 int zs_def_cflag = (CREAD | CS8 | HUPCL); 77 int zs_major = 1; 78 79 int 80 zs_print(aux, name) 81 void *aux; 82 const char *name; 83 { 84 struct zsc_attach_args *args = aux; 85 86 if (name != NULL) 87 printf("%s: ", name); 88 89 if (args->channel != -1) 90 printf(" channel %d", args->channel); 91 92 return UNCONF; 93 } 94 95 static volatile int zssoftpending; 96 97 /* 98 * Our ZS chips all share a common, autovectored interrupt, 99 * so we have to look at all of them on each interrupt. 100 */ 101 int 102 zshard(arg) 103 void *arg; 104 { 105 register struct zsc_softc *zsc; 106 register int unit, rval, softreq; 107 108 rval = softreq = 0; 109 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 110 zsc = zsc_cd.cd_devs[unit]; 111 if (zsc == NULL) 112 continue; 113 rval |= zsc_intr_hard(zsc); 114 softreq |= zsc->zsc_cs[0]->cs_softreq; 115 softreq |= zsc->zsc_cs[1]->cs_softreq; 116 } 117 118 /* We are at splzs here, so no need to lock. */ 119 if (softreq && (zssoftpending == 0)) { 120 zssoftpending = 1; 121 setsoftserial(); 122 } 123 124 return rval; 125 } 126 127 /* 128 * Similar scheme as for zshard (look at all of them) 129 */ 130 void 131 zssoft(arg) 132 void *arg; 133 { 134 register struct zsc_softc *zsc; 135 register int s, unit; 136 137 /* This is not the only ISR on this IPL. */ 138 if (zssoftpending == 0) 139 return; 140 141 /* 142 * The soft intr. bit will be set by zshard only if 143 * the variable zssoftpending is zero. The order of 144 * these next two statements prevents our clearing 145 * the soft intr bit just after zshard has set it. 146 */ 147 /* clearsoftnet(); */ 148 zssoftpending = 0; 149 150 /* Make sure we call the tty layer at spltty. */ 151 s = spltty(); 152 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 153 zsc = zsc_cd.cd_devs[unit]; 154 if (zsc == NULL) 155 continue; 156 (void)zsc_intr_soft(zsc); 157 } 158 splx(s); 159 } 160 161 /* 162 * Compute the current baud rate given a ZS channel. 163 */ 164 int 165 zs_get_speed(cs) 166 struct zs_chanstate *cs; 167 { 168 int tconst; 169 170 tconst = zs_read_reg(cs, 12); 171 tconst |= zs_read_reg(cs, 13) << 8; 172 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 173 } 174 175 /* 176 * MD functions for setting the baud rate and control modes. 177 */ 178 int 179 zs_set_speed(cs, bps) 180 struct zs_chanstate *cs; 181 int bps; /* bits per second */ 182 { 183 int tconst, real_bps; 184 185 if (bps == 0) 186 return (0); 187 188 #ifdef DIAGNOSTIC 189 if (cs->cs_brg_clk == 0) 190 panic("zs_set_speed"); 191 #endif 192 193 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 194 if (tconst < 0) 195 return (EINVAL); 196 197 /* Convert back to make sure we can do it. */ 198 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 199 200 /* XXX - Allow some tolerance here? */ 201 if (real_bps != bps) 202 return (EINVAL); 203 204 cs->cs_preg[12] = tconst; 205 cs->cs_preg[13] = tconst >> 8; 206 207 /* Caller will stuff the pending registers. */ 208 return (0); 209 } 210 211 int 212 zs_set_modes(cs, cflag) 213 struct zs_chanstate *cs; 214 int cflag; /* bits per second */ 215 { 216 int s; 217 218 /* 219 * Output hardware flow control on the chip is horrendous: 220 * if carrier detect drops, the receiver is disabled, and if 221 * CTS drops, the transmitter is stoped IN MID CHARACTER! 222 * Therefore, NEVER set the HFC bit, and instead use the 223 * status interrupt to detect CTS changes. 224 */ 225 s = splzs(); 226 cs->cs_rr0_pps = 0; 227 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 228 cs->cs_rr0_dcd = 0; 229 if ((cflag & MDMBUF) == 0) 230 cs->cs_rr0_pps = ZSRR0_DCD; 231 } else 232 cs->cs_rr0_dcd = ZSRR0_DCD; 233 if ((cflag & CRTSCTS) != 0) { 234 cs->cs_wr5_dtr = ZSWR5_DTR; 235 cs->cs_wr5_rts = ZSWR5_RTS; 236 cs->cs_rr0_cts = ZSRR0_CTS; 237 } else if ((cflag & MDMBUF) != 0) { 238 cs->cs_wr5_dtr = 0; 239 cs->cs_wr5_rts = ZSWR5_DTR; 240 cs->cs_rr0_cts = ZSRR0_DCD; 241 } else { 242 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 243 cs->cs_wr5_rts = 0; 244 cs->cs_rr0_cts = 0; 245 } 246 splx(s); 247 248 /* Caller will stuff the pending registers. */ 249 return (0); 250 } 251 252 /* 253 * Read or write the chip with suitable delays. 254 */ 255 256 u_char 257 zs_read_reg(cs, reg) 258 struct zs_chanstate *cs; 259 u_char reg; 260 { 261 u_char val; 262 263 *cs->cs_reg_csr = reg; 264 ZS_DELAY(); 265 val = *cs->cs_reg_csr; 266 ZS_DELAY(); 267 return val; 268 } 269 270 void 271 zs_write_reg(cs, reg, val) 272 struct zs_chanstate *cs; 273 u_char reg, val; 274 { 275 *cs->cs_reg_csr = reg; 276 ZS_DELAY(); 277 *cs->cs_reg_csr = val; 278 ZS_DELAY(); 279 } 280 281 u_char zs_read_csr(cs) 282 struct zs_chanstate *cs; 283 { 284 register u_char val; 285 286 val = *cs->cs_reg_csr; 287 ZS_DELAY(); 288 return val; 289 } 290 291 void zs_write_csr(cs, val) 292 struct zs_chanstate *cs; 293 u_char val; 294 { 295 *cs->cs_reg_csr = val; 296 ZS_DELAY(); 297 } 298 299 u_char zs_read_data(cs) 300 struct zs_chanstate *cs; 301 { 302 register u_char val; 303 304 val = *cs->cs_reg_data; 305 ZS_DELAY(); 306 return val; 307 } 308 309 void zs_write_data(cs, val) 310 struct zs_chanstate *cs; 311 u_char val; 312 { 313 *cs->cs_reg_data = val; 314 ZS_DELAY(); 315 } 316 317 void 318 zs_abort(cs) 319 struct zs_chanstate *cs; 320 { 321 #ifdef DDB 322 Debugger(); 323 #endif 324 } 325