1/* $NetBSD: locore_machdep.S,v 1.8 2002/06/01 12:27:07 simonb Exp $ */ 2 3/* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Digital Equipment Corporation, Ralph Campbell, Sony Corp and 9 * Kazumasa Utashiro of Software Research Associates, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Copyright (C) 1989 Digital Equipment Corporation. 40 * Permission to use, copy, modify, and distribute this software and 41 * its documentation for any purpose and without fee is hereby granted, 42 * provided that the above copyright notice appears in all copies. 43 * Digital Equipment Corporation makes no representations about the 44 * suitability of this software for any purpose. It is provided "as is" 45 * without express or implied warranty. 46 * 47 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, 48 * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) 49 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, 50 * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) 51 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, 52 * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) 53 * 54 * @(#)locore.s 8.5 (Berkeley) 1/4/94 55 */ 56 57 58/* 59 * NEWS-specific mips locore code. 60 */ 61 62#include <mips/asm.h> 63#include <mips/cpuregs.h> 64#include <machine/machConst.h> 65#include <machine/param.h> 66 67 .set noreorder 68 69LEAF(to_monitor) 70 li v0, MIPS_SR_BEV # no interrupt and 71 mtc0 v0, MIPS_COP_0_STATUS_REG # boot strap exception vector 72 nop 73 nop 74 nop 75 nop 76 li a1, MACH_MONARG_ADDR|MIPS_KSEG1_START 77 sw a0, (a1) # pass argument(howto) 78 move a0, zero # syscall(#0) 79 syscall 80 nop 81END(to_monitor) 82 83/* 84 * nesting interrupt masks. 85 */ 86#define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0 87#define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0) 88#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1) 89#define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0) 90#define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1) 91#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2) 92#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3) 93#define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4) 94 95/* 96 * hardware-level spls for hardware where the device interrupt priorites 97 * are ordered, and map onto mips interrupt pins in increasing priority. 98 * This maps directly onto BSD spl levels. 99 */ 100 101/* 102 * Block out int2 (hardware interrupt 0) and lower mips levels. 103 */ 104LEAF(cpu_spl0) 105 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 106 li t0, ~(MIPS_INT_MASK_SPL0) 107 and t0, t0, v0 108 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 109 nop # 3 ins to disable on r4x00 110 j ra 111 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 112END(cpu_spl0) 113 114/* 115 * Block out Int3 (hardware interrupt 1) and lower mips levels. 116 */ 117LEAF(cpu_spl1) 118 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 119 li t0, ~(MIPS_INT_MASK_SPL1) 120 and t0, t0, v0 121 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 122 nop # 3 ins to disable on r4x00 123 j ra 124 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 125END(cpu_spl1) 126 127LEAF(cpu_spl2) 128 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 129 li t0, ~(MIPS_INT_MASK_SPL2) 130 and t0, t0, v0 131 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 132 nop # 3 ins to disable on r4x00 133 j ra 134 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 135END(cpu_spl2) 136 137LEAF(cpu_spl3) 138 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 139 li t0, ~(MIPS_INT_MASK_SPL3) 140 and t0, t0, v0 141 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 142 nop # 3 ins to disable on r4x00 143 j ra 144 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 145END(cpu_spl3) 146 147LEAF(cpu_spl4) 148 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 149 li t0, ~(MIPS_INT_MASK_SPL4) 150 151 and t0, t0, v0 152 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 153 nop # 3 ins to disable 154 j ra 155 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 156END(cpu_spl4) 157 158LEAF(cpu_spl5) 159 mfc0 v0, MIPS_COP_0_STATUS_REG # read status register 160 li t0, ~(MIPS_INT_MASK_SPL5) 161 and t0, t0, v0 162 mtc0 t0, MIPS_COP_0_STATUS_REG # save it 163 nop # 3 ins to disable 164 j ra 165 and v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 166END(cpu_spl5) 167 168#ifdef MIPS3 169 .set mips3 170 .set noat 171 .globl checkromwork 172checkromwork: 173 dmfc0 k0, MIPS_COP_0_BAD_VADDR 174 175 li k1, 0xfff00000 # NEWS5000 ROM Work: 0xFFF00000~0xFFFFFFFF (1Mbyte) 176 sltu k1, k0, k1 177 bne k1, zero, outofworld 178 179 li k1, 0x000fe000 # XXX (depend on 4k page) 180 and k1, k0, k1 # k1 = (VADDR - 0xFFF00000) & 0xffffe000 181 182 la k0, _C_LABEL(physmem) 183 lw k0, 0(k0) # k0 = page of physmem (tail of maxmemory - 0x00100000) 184 sll k0, k0, PGSHIFT # k0 = memory tail 185 add k0, k0, k1 # 0xfff00000+? -> memory tail + ? 186 187 srl k0, k0, 6 # MIPS3_PG_SHIFT 188 li k1, 0x02|0x18|0x01 # MIPS3_PG_V|MIPS3_PG_CACHED|MIPS3_PG_G 189 or k0, k0, k1 190 191 li k1, 64 # set ODD page 192 add k1, k0, k1 193 194 dsll k0, k0, 34 # get rid of "wired" bit 195 dsrl k0, k0, 34 196 dmtc0 k0, MIPS_COP_0_TLB_LO0 # load PTE entry 197 dsll k1, k1, 34 198 dsrl k1, k1, 34 199 dmtc0 k1, MIPS_COP_0_TLB_LO1 # load PTE entry 200 nop 201 nop # required for QED5230 202 tlbwr # write TLB 203 nop 204 nop 205 nop 206 nop 207 nop 208 eret 209 210outofworld: 211 /* Ensure we have a valid sp so panic has a chance */ 212 move a1, sp 213 la sp, start # set sp to a valid place 214 PANIC("TLB out of universe: ksp was %p") 215 216 .set at 217#endif /* MIPS3 */ 218 219/* 220 * Interrupt counters for vmstat. 221 */ 222 .data 223 .globl _C_LABEL(intrcnt) 224 .globl _C_LABEL(eintrcnt) 225 .globl _C_LABEL(intrnames) 226 .globl _C_LABEL(eintrnames) 227_C_LABEL(intrnames): 228 .asciiz "softclock" 229 .asciiz "softnet" 230 .asciiz "serial0" 231 .asciiz "serial1" 232 .asciiz "serial2" 233 .asciiz "ether" 234 .asciiz "scsi" 235 .asciiz "memory" 236 .asciiz "clock" 237 .asciiz "fpu" 238 .asciiz "slot1" 239 .asciiz "slot2" 240 .asciiz "slot3" 241 .asciiz "floppy" 242 .asciiz "stray" 243 .asciiz "nmi" 244 .asciiz "lostclock" 245_C_LABEL(eintrnames): 246 .align 2 247_C_LABEL(intrcnt): 248 .word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 249_C_LABEL(eintrcnt): 250 .word 0 # This shouldn't be needed but with 4.4bsd's as, the eintrcnt 251 # label ends end up in a different section otherwise. 252