1 /* $NetBSD: mb8795var.h,v 1.7 2002/09/11 01:46:32 mycroft Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "rnd.h" /* is random device-driver configured? */ 33 #if NRND > 0 34 #include <sys/rnd.h> 35 #endif /* NRND */ 36 37 #define MB8795_NRXBUFS (32) 38 39 struct mb8795_softc; 40 41 /* 42 * Function switch used as glue to MD code. 43 */ 44 struct mb8795_glue { 45 /* Mandatory entry points. */ 46 u_char (*gl_read_reg)(struct mb8795_softc *, int); 47 void (*gl_write_reg)(struct mb8795_softc *, int, u_char); 48 void (*gl_dma_reset)(struct mb8795_softc *); 49 void (*gl_dma_rx_setup)(struct mb8795_softc *); 50 void (*gl_dma_rx_go)(struct mb8795_softc *); 51 struct mbuf * (*gl_dma_rx_mbuf)(struct mb8795_softc *); 52 void (*gl_dma_tx_setup)(struct mb8795_softc *); 53 void (*gl_dma_tx_go)(struct mb8795_softc *); 54 int (*gl_dma_tx_mbuf)(struct mb8795_softc *, struct mbuf *); 55 int (*gl_dma_tx_isactive)(struct mb8795_softc *); 56 #if 0 57 int (*gl_dma_setup)(struct mb8795_softc *, 58 caddr_t *, size_t *, int, size_t *); 59 void (*gl_dma_go)(struct mb8795_softc *); 60 void (*gl_dma_stop)(struct mb8795_softc *); 61 int (*gl_dma_isactive)(struct mb8795_softc *); 62 #endif 63 /* Optional entry points. */ 64 }; 65 66 struct mb8795_softc { 67 struct device sc_dev; /* base device glue */ 68 struct ethercom sc_ethercom; /* Ethernet common part */ 69 70 struct mb8795_glue *sc_glue; /* glue to MD code */ 71 72 void *sc_sh; /* shutdownhook cookie */ 73 74 int sc_debug; 75 76 bus_space_tag_t sc_bmap_bst; /* bus space tag */ 77 78 bus_space_handle_t sc_bmap_bsh; /* bus space handle */ 79 80 u_int8_t sc_enaddr[6]; 81 82 struct ifaltq sc_tx_snd; 83 84 struct ifmedia sc_media; 85 86 #if NRND > 0 87 rndsource_element_t rnd_source; 88 #endif /* NRND */ 89 90 }; 91 92 /* 93 * Macros to read and write the chip's registers. 94 */ 95 #define MB_READ_REG(sc, reg) \ 96 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 97 #define MB_WRITE_REG(sc, reg, val) \ 98 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 99 100 /* 101 * DMA macros for mb8795 102 */ 103 #define MBDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 104 #define MBDMA_SETUP(sc, addr, len, datain, dmasize) \ 105 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 106 #define MBDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 107 #define MBDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 108 #define MBDMA_RX_SETUP(sc) (*(sc)->sc_glue->gl_dma_rx_setup) ((sc)) 109 #define MBDMA_RX_GO(sc) (*(sc)->sc_glue->gl_dma_rx_go) ((sc)) 110 #define MBDMA_RX_MBUF(sc) (*(sc)->sc_glue->gl_dma_rx_mbuf) ((sc)) 111 #define MBDMA_TX_SETUP(sc) (*(sc)->sc_glue->gl_dma_tx_setup) ((sc)) 112 #define MBDMA_TX_GO(sc) (*(sc)->sc_glue->gl_dma_tx_go) ((sc)) 113 #define MBDMA_TX_MBUF(sc,m) (*(sc)->sc_glue->gl_dma_tx_mbuf) ((sc), (m)) 114 #define MBDMA_TX_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_tx_isactive)((sc)) 115 116 void mb8795_config __P((struct mb8795_softc *, int *, int, int)); 117 void mb8795_init __P((struct mb8795_softc *)); 118 int mb8795_ioctl __P((struct ifnet *, u_long, caddr_t)); 119 void mb8795_reset __P((struct mb8795_softc *)); 120 void mb8795_start __P((struct ifnet *)); 121 void mb8795_stop __P((struct mb8795_softc *)); 122 void mb8795_watchdog __P((struct ifnet *)); 123 124 void mb8795_rint __P((struct mb8795_softc *)); 125 void mb8795_tint __P((struct mb8795_softc *)); 126