1 /* $NetBSD: wdc_spd.c,v 1.3 2002/10/02 04:17:21 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/malloc.h> 42 43 #define __read_1(a) \ 44 ({ \ 45 u_int32_t a_ = (a); \ 46 u_int8_t r = (*(__volatile__ u_int8_t *)a_); \ 47 \ 48 if (a_ == 0xb400004e) /* (wdc)STAT LED off */ \ 49 SPD_LED_OFF(); \ 50 \ 51 (r); \ 52 }) 53 #define __write_1(a, v) \ 54 { \ 55 u_int32_t a_ = (a); \ 56 (*(__volatile__ u_int8_t *)a_) = (v); \ 57 \ 58 if (a_ == 0xb400004e) /* (wdc)CMD LED on */ \ 59 SPD_LED_ON(); \ 60 } 61 #define _PLAYSTATION2_BUS_SPACE_PRIVATE 62 #include <machine/bus.h> 63 64 #include <dev/ata/atavar.h> 65 #include <dev/ic/wdcvar.h> 66 67 #include <playstation2/ee/eevar.h> 68 #include <playstation2/dev/spdvar.h> 69 #include <playstation2/dev/spdreg.h> 70 71 #define WDC_SPD_HDD_AUXREG_OFFSET 0x1c 72 73 struct wdc_spd_softc { 74 struct wdc_softc sc_wdcdev; 75 struct channel_softc *wdc_chanptr; 76 struct channel_softc wdc_channel; 77 void *sc_ih; 78 }; 79 80 #ifdef DEBUG 81 #define STATIC 82 #else 83 #define STATIC static 84 #endif 85 86 STATIC int wdc_spd_match(struct device *, struct cfdata *, void *); 87 STATIC void wdc_spd_attach(struct device *, struct device *, void *); 88 89 CFATTACH_DECL(wdc_spd, sizeof (struct wdc_spd_softc), 90 wdc_spd_match, wdc_spd_attach, NULL, NULL); 91 92 extern struct cfdriver wdc_cd; 93 94 STATIC void __wdc_spd_enable(void); 95 STATIC void __wdc_spd_disable(void) __attribute__((__unused__)); 96 STATIC void __wdc_spd_bus_space(struct channel_softc *); 97 98 /* 99 * wdc register is 16 bit wide. 100 */ 101 #define VADDR(h, o) ((h) + ((o) << 1)) 102 _BUS_SPACE_READ(_wdc_spd, 1, 8) 103 _BUS_SPACE_READ(_wdc_spd, 2, 16) 104 _BUS_SPACE_READ_MULTI(_wdc_spd, 1, 8) 105 _BUS_SPACE_READ_MULTI(_wdc_spd, 2, 16) 106 _BUS_SPACE_READ_REGION(_wdc_spd, 1, 8) 107 _BUS_SPACE_READ_REGION(_wdc_spd, 2, 16) 108 _BUS_SPACE_WRITE(_wdc_spd, 1, 8) 109 _BUS_SPACE_WRITE(_wdc_spd, 2, 16) 110 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 1, 8) 111 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 2, 16) 112 _BUS_SPACE_WRITE_REGION(_wdc_spd, 1, 8) 113 _BUS_SPACE_WRITE_REGION(_wdc_spd, 2, 16) 114 _BUS_SPACE_SET_MULTI(_wdc_spd, 1, 8) 115 _BUS_SPACE_SET_MULTI(_wdc_spd, 2, 16) 116 _BUS_SPACE_SET_REGION(_wdc_spd, 1, 8) 117 _BUS_SPACE_SET_REGION(_wdc_spd, 2, 16) 118 _BUS_SPACE_COPY_REGION(_wdc_spd, 1, 8) 119 _BUS_SPACE_COPY_REGION(_wdc_spd, 2, 16) 120 #undef VADDR 121 122 STATIC const struct playstation2_bus_space _wdc_spd_space = { 123 pbs_map : _BUS_SPACE_NO_MAP, 124 pbs_unmap : _BUS_SPACE_NO_UNMAP, 125 pbs_subregion : _BUS_SPACE_NO_SUBREGION, 126 pbs_alloc : _BUS_SPACE_NO_ALLOC, 127 pbs_free : _BUS_SPACE_NO_FREE, 128 pbs_vaddr : _BUS_SPACE_NO_VADDR, 129 pbs_r_1 : _wdc_spd_read_1, 130 pbs_r_2 : _wdc_spd_read_2, 131 pbs_r_4 : _BUS_SPACE_NO_READ(4, 32), 132 pbs_r_8 : _BUS_SPACE_NO_READ(8, 64), 133 pbs_rm_1 : _wdc_spd_read_multi_1, 134 pbs_rm_2 : _wdc_spd_read_multi_2, 135 pbs_rm_4 : _BUS_SPACE_NO_READ_MULTI(4, 32), 136 pbs_rm_8 : _BUS_SPACE_NO_READ_MULTI(8, 64), 137 pbs_rr_1 : _wdc_spd_read_region_1, 138 pbs_rr_2 : _wdc_spd_read_region_2, 139 pbs_rr_4 : _BUS_SPACE_NO_READ_REGION(4, 32), 140 pbs_rr_8 : _BUS_SPACE_NO_READ_REGION(8, 64), 141 pbs_w_1 : _wdc_spd_write_1, 142 pbs_w_2 : _wdc_spd_write_2, 143 pbs_w_4 : _BUS_SPACE_NO_WRITE(4, 32), 144 pbs_w_8 : _BUS_SPACE_NO_WRITE(8, 64), 145 pbs_wm_1 : _wdc_spd_write_multi_1, 146 pbs_wm_2 : _wdc_spd_write_multi_2, 147 pbs_wm_4 : _BUS_SPACE_NO_WRITE_MULTI(4, 32), 148 pbs_wm_8 : _BUS_SPACE_NO_WRITE_MULTI(8, 64), 149 pbs_wr_1 : _wdc_spd_write_region_1, 150 pbs_wr_2 : _wdc_spd_write_region_2, 151 pbs_wr_4 : _BUS_SPACE_NO_WRITE_REGION(4, 32), 152 pbs_wr_8 : _BUS_SPACE_NO_WRITE_REGION(8, 64), 153 pbs_sm_1 : _wdc_spd_set_multi_1, 154 pbs_sm_2 : _wdc_spd_set_multi_2, 155 pbs_sm_4 : _BUS_SPACE_NO_SET_MULTI(4, 32), 156 pbs_sm_8 : _BUS_SPACE_NO_SET_MULTI(8, 64), 157 pbs_sr_1 : _wdc_spd_set_region_1, 158 pbs_sr_2 : _wdc_spd_set_region_2, 159 pbs_sr_4 : _BUS_SPACE_NO_SET_REGION(4, 32), 160 pbs_sr_8 : _BUS_SPACE_NO_SET_REGION(8, 64), 161 pbs_c_1 : _wdc_spd_copy_region_1, 162 pbs_c_2 : _wdc_spd_copy_region_2, 163 pbs_c_4 : _BUS_SPACE_NO_COPY_REGION(4, 32), 164 pbs_c_8 : _BUS_SPACE_NO_COPY_REGION(8, 64), 165 }; 166 167 int 168 wdc_spd_match(struct device *parent, struct cfdata *cf, void *aux) 169 { 170 struct spd_attach_args *spa = aux; 171 struct channel_softc ch; 172 int i, result; 173 174 if (spa->spa_slot != SPD_HDD) 175 return (0); 176 177 memset(&ch, 0, sizeof(ch)); 178 __wdc_spd_bus_space(&ch); 179 180 for (i = 0, result = 0; i < 8; i++) { /* 8 sec */ 181 if (result == 0) 182 result = wdcprobe(&ch); 183 delay(1000000); 184 } 185 186 return (result); 187 } 188 189 void 190 wdc_spd_attach(struct device *parent, struct device *self, void *aux) 191 { 192 struct spd_attach_args *spa = aux; 193 struct wdc_spd_softc *sc = (void *)self; 194 struct wdc_softc *wdc = &sc->sc_wdcdev; 195 struct channel_softc *ch = &sc->wdc_channel; 196 197 printf(": %s\n", spa->spa_product_name); 198 199 __wdc_spd_bus_space(ch); 200 201 wdc->cap = 202 WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | WDC_CAPABILITY_DATA16; 203 wdc->PIO_cap = 0; 204 sc->wdc_chanptr = &sc->wdc_channel; 205 wdc->channels = &sc->wdc_chanptr; 206 wdc->nchannels = 1; 207 ch->channel = 0; 208 ch->wdc = &sc->sc_wdcdev; 209 ch->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF, 210 M_NOWAIT); 211 212 if (ch->ch_queue == NULL) { 213 printf("%s: can't allocate memory for command queue", 214 wdc->sc_dev.dv_xname); 215 return; 216 } 217 218 spd_intr_establish(SPD_HDD, wdcintr, &sc->wdc_channel); 219 220 __wdc_spd_enable(); 221 222 wdcattach(&sc->wdc_channel); 223 } 224 225 void 226 __wdc_spd_bus_space(struct channel_softc *ch) 227 { 228 229 ch->cmd_iot = &_wdc_spd_space; 230 ch->cmd_ioh = SPD_HDD_IO_BASE; 231 ch->ctl_iot = &_wdc_spd_space; 232 ch->ctl_ioh = SPD_HDD_IO_BASE + WDC_SPD_HDD_AUXREG_OFFSET; 233 ch->data32iot = ch->cmd_iot; 234 ch->data32ioh = ch->cmd_ioh; 235 } 236 237 void 238 __wdc_spd_enable() 239 { 240 u_int16_t r; 241 242 r = _reg_read_2(SPD_INTR_ENABLE_REG16); 243 r |= SPD_INTR_HDD; 244 _reg_write_2(SPD_INTR_ENABLE_REG16, r); 245 } 246 247 void 248 __wdc_spd_disable() 249 { 250 u_int16_t r; 251 252 r = _reg_read_2(SPD_INTR_ENABLE_REG16); 253 r &= ~SPD_INTR_HDD; 254 _reg_write_2(SPD_INTR_ENABLE_REG16, r); 255 } 256