1 /* $NetBSD: timer.c,v 1.1 2001/10/16 15:38:39 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "debug_playstation2.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 44 #include <playstation2/playstation2/interrupt.h> 45 46 #include <playstation2/ee/eevar.h> 47 #include <playstation2/ee/intcvar.h> 48 #include <playstation2/ee/timervar.h> 49 #include <playstation2/ee/timerreg.h> 50 51 52 #ifdef DEBUG 53 #define STATIC 54 #else 55 #define STATIC static 56 #endif 57 58 STATIC int timer0_intr(void *); 59 60 /* 61 * EE timer usage 62 * 0 ... 100 Hz clock interrupt. 63 * 1 ... one shot interrupt for software interrupt for IPL_SOFT 64 * 2 ... for IPL_SOFTCLOCK 65 * 3 ... for IPL_SOFTNET, IPL_SOFTSERIAL 66 */ 67 68 void 69 timer_init() 70 { 71 72 _reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF)); 73 _reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF)); 74 _reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF)); 75 _reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF)); 76 } 77 78 void 79 timer_clock_init() 80 { 81 /* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */ 82 intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0); 83 _reg_write_4(T0_COUNT_REG, 0); 84 _reg_write_4(T0_COMP_REG, 5760); 85 _reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET | 86 T_MODE_CUE | T_MODE_CMPE); 87 } 88 89 void 90 timer_one_shot(int timer) 91 { 92 KDASSERT(LEGAL_TIMER(timer) && timer != 0); 93 94 _reg_write_4(T_COUNT_REG(timer), 0); 95 _reg_write_4(T_COMP_REG(timer), 1); 96 _reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE); 97 } 98 99 /* 100 * interrupt handler for clock interrupt (100Hz) 101 */ 102 int 103 timer0_intr(void *arg) 104 { 105 106 _reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF); 107 108 _playstation2_evcnt.clock.ev_count++; 109 110 hardclock(&playstation2_clockframe); 111 112 return (1); 113 } 114 115 /* one shot timer interrupt for software interrupt */ 116 int 117 timer1_intr(void *arg) 118 { 119 120 _reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF); 121 122 softintr_dispatch(0); /* IPL_SOFT */ 123 124 return (1); 125 } 126 127 int 128 timer2_intr(void *arg) 129 { 130 131 _reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF); 132 133 softintr_dispatch(1); /* IPL_SOFTCLOCK */ 134 135 return (1); 136 } 137 138 int 139 timer3_intr(void *arg) 140 { 141 142 _reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF); 143 144 softintr_dispatch(3); /* IPL_SOFTSERIAL */ 145 softintr_dispatch(2); /* IPL_SOFTNET */ 146 147 return (1); 148 } 149