1 /* $NetBSD: bus.h,v 1.3 2002/08/14 17:02:07 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #ifndef _PLAYSTATION2_BUS_H_ 68 #define _PLAYSTATION2_BUS_H_ 69 70 #include <sys/types.h> 71 72 #ifdef _KERNEL 73 /* 74 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 75 */ 76 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 77 #define BUS_SPACE_DEBUG 78 #endif 79 80 #ifdef BUS_SPACE_DEBUG 81 #include <sys/systm.h> /* for printf() prototype */ 82 /* 83 * Macros for checking the aligned-ness of pointers passed to bus 84 * space ops. Strict alignment is required by the MIPS architecture, 85 * and a trap will occur if unaligned access is performed. These 86 * may aid in the debugging of a broken device driver by displaying 87 * useful information about the problem. 88 */ 89 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 90 ((((u_int32_t)(p)) & (sizeof(t)-1)) == 0) 91 92 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 93 ({ \ 94 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 95 printf("%s 0x%x not aligned to %u bytes %s:%d\n", \ 96 d, (u_int32_t)(p), (u_int32_t)sizeof(t), __FILE__, \ 97 __LINE__); \ 98 } \ 99 (void) 0; \ 100 }) 101 102 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 103 #else 104 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 105 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 106 #endif /* BUS_SPACE_DEBUG */ 107 #endif /* _KERNEL */ 108 109 /* 110 * Addresses (in bus space). 111 */ 112 typedef long bus_addr_t; 113 typedef long bus_size_t; 114 115 /* 116 * Access methods for bus space. 117 */ 118 typedef const struct playstation2_bus_space *bus_space_tag_t; 119 typedef bus_addr_t bus_space_handle_t; 120 121 struct extent; /* forward declaration */ 122 123 struct playstation2_bus_space { 124 struct extent *pbs_extent; 125 bus_addr_t pbs_base_addr; 126 127 /* cookie */ 128 void *pbs_cookie; 129 130 /* mapping/unmapping */ 131 int (*pbs_map)(void *, bus_addr_t, bus_size_t, 132 int, bus_space_handle_t *); 133 void (*pbs_unmap)(void *, bus_space_handle_t, 134 bus_size_t); 135 int (*pbs_subregion)(void *, bus_space_handle_t, 136 bus_size_t, bus_size_t, bus_space_handle_t *); 137 138 /* allocation/deallocation */ 139 int (*pbs_alloc)(void *, bus_addr_t, bus_addr_t, 140 bus_size_t, bus_size_t, bus_size_t, int, 141 bus_addr_t *, bus_space_handle_t *); 142 void (*pbs_free)(void *, bus_space_handle_t, 143 bus_size_t); 144 145 /* get kernel virtual address */ 146 void * (*pbs_vaddr)(void *, bus_space_handle_t); 147 148 /* read (single) */ 149 u_int8_t (*pbs_r_1)(void *, bus_space_handle_t, 150 bus_size_t); 151 u_int16_t (*pbs_r_2)(void *, bus_space_handle_t, 152 bus_size_t); 153 u_int32_t (*pbs_r_4)(void *, bus_space_handle_t, 154 bus_size_t); 155 u_int64_t (*pbs_r_8)(void *, bus_space_handle_t, 156 bus_size_t); 157 158 /* read multiple */ 159 void (*pbs_rm_1)(void *, bus_space_handle_t, 160 bus_size_t, u_int8_t *, bus_size_t); 161 void (*pbs_rm_2)(void *, bus_space_handle_t, 162 bus_size_t, u_int16_t *, bus_size_t); 163 void (*pbs_rm_4)(void *, bus_space_handle_t, 164 bus_size_t, u_int32_t *, bus_size_t); 165 void (*pbs_rm_8)(void *, bus_space_handle_t, 166 bus_size_t, u_int64_t *, bus_size_t); 167 168 /* read region */ 169 void (*pbs_rr_1)(void *, bus_space_handle_t, 170 bus_size_t, u_int8_t *, bus_size_t); 171 void (*pbs_rr_2)(void *, bus_space_handle_t, 172 bus_size_t, u_int16_t *, bus_size_t); 173 void (*pbs_rr_4)(void *, bus_space_handle_t, 174 bus_size_t, u_int32_t *, bus_size_t); 175 void (*pbs_rr_8)(void *, bus_space_handle_t, 176 bus_size_t, u_int64_t *, bus_size_t); 177 178 /* write (single) */ 179 void (*pbs_w_1)(void *, bus_space_handle_t, 180 bus_size_t, u_int8_t); 181 void (*pbs_w_2)(void *, bus_space_handle_t, 182 bus_size_t, u_int16_t); 183 void (*pbs_w_4)(void *, bus_space_handle_t, 184 bus_size_t, u_int32_t); 185 void (*pbs_w_8)(void *, bus_space_handle_t, 186 bus_size_t, u_int64_t); 187 188 /* write multiple */ 189 void (*pbs_wm_1)(void *, bus_space_handle_t, 190 bus_size_t, const u_int8_t *, bus_size_t); 191 void (*pbs_wm_2)(void *, bus_space_handle_t, 192 bus_size_t, const u_int16_t *, bus_size_t); 193 void (*pbs_wm_4)(void *, bus_space_handle_t, 194 bus_size_t, const u_int32_t *, bus_size_t); 195 void (*pbs_wm_8)(void *, bus_space_handle_t, 196 bus_size_t, const u_int64_t *, bus_size_t); 197 198 /* write region */ 199 void (*pbs_wr_1)(void *, bus_space_handle_t, 200 bus_size_t, const u_int8_t *, bus_size_t); 201 void (*pbs_wr_2)(void *, bus_space_handle_t, 202 bus_size_t, const u_int16_t *, bus_size_t); 203 void (*pbs_wr_4)(void *, bus_space_handle_t, 204 bus_size_t, const u_int32_t *, bus_size_t); 205 void (*pbs_wr_8)(void *, bus_space_handle_t, 206 bus_size_t, const u_int64_t *, bus_size_t); 207 208 /* set multiple */ 209 void (*pbs_sm_1)(void *, bus_space_handle_t, 210 bus_size_t, u_int8_t, bus_size_t); 211 void (*pbs_sm_2)(void *, bus_space_handle_t, 212 bus_size_t, u_int16_t, bus_size_t); 213 void (*pbs_sm_4)(void *, bus_space_handle_t, 214 bus_size_t, u_int32_t, bus_size_t); 215 void (*pbs_sm_8)(void *, bus_space_handle_t, 216 bus_size_t, u_int64_t, bus_size_t); 217 218 /* set region */ 219 void (*pbs_sr_1)(void *, bus_space_handle_t, 220 bus_size_t, u_int8_t, bus_size_t); 221 void (*pbs_sr_2)(void *, bus_space_handle_t, 222 bus_size_t, u_int16_t, bus_size_t); 223 void (*pbs_sr_4)(void *, bus_space_handle_t, 224 bus_size_t, u_int32_t, bus_size_t); 225 void (*pbs_sr_8)(void *, bus_space_handle_t, 226 bus_size_t, u_int64_t, bus_size_t); 227 228 /* copy */ 229 void (*pbs_c_1)(void *, bus_space_handle_t, bus_size_t, 230 bus_space_handle_t, bus_size_t, bus_size_t); 231 void (*pbs_c_2)(void *, bus_space_handle_t, bus_size_t, 232 bus_space_handle_t, bus_size_t, bus_size_t); 233 void (*pbs_c_4)(void *, bus_space_handle_t, bus_size_t, 234 bus_space_handle_t, bus_size_t, bus_size_t); 235 void (*pbs_c_8)(void *, bus_space_handle_t, bus_size_t, 236 bus_space_handle_t, bus_size_t, bus_size_t); 237 }; 238 239 #ifdef _KERNEL 240 #define _wbflush() __asm__ __volatile__("sync.l") 241 #ifdef _PLAYSTATION2_BUS_SPACE_PRIVATE 242 243 #ifndef __read_1 244 #define __read_1(a) (*(__volatile__ u_int8_t *)(a)) 245 #endif 246 #ifndef __read_2 247 #define __read_2(a) (*(__volatile__ u_int16_t *)(a)) 248 #endif 249 #ifndef __read_4 250 #define __read_4(a) (*(__volatile__ u_int32_t *)(a)) 251 #endif 252 #ifndef __read_8 253 #define __read_8(a) \ 254 ({ \ 255 u_int32_t lo, hi; \ 256 __asm__ __volatile__( \ 257 ".set noreorder;" \ 258 ".set push;" \ 259 ".set mips3;" \ 260 "ld $8, (%2);" \ 261 "dsra %1, $8, 32;" \ 262 "dsll %0, $8, 32;" \ 263 "dsra %0, %0, 32;" \ 264 ".set pop;" \ 265 ".set reorder;" \ 266 : "=r"(lo), "=r"(hi) : "r"(a) : "$8"); \ 267 ((u_int64_t)hi << 32) | lo; \ 268 }) 269 #endif 270 #define __read_16(a) "error. not yet" 271 272 #ifndef __write_1 273 #define __write_1(a, v) { \ 274 *(__volatile__ u_int8_t *)(a) = (v); \ 275 _wbflush(); \ 276 } 277 #endif 278 #ifndef __write_2 279 #define __write_2(a, v) { \ 280 *(__volatile__ u_int16_t *)(a) = (v); \ 281 _wbflush(); \ 282 } 283 #endif 284 #ifndef __write_4 285 #define __write_4(a, v) { \ 286 *(__volatile__ u_int32_t *)(a) = (v); \ 287 _wbflush(); \ 288 } 289 #endif 290 #ifdef EE_GCC 291 #ifndef __write_8 292 #define __write_8(a, v) (*(volatile u_int64_t *)(a) = (v)) { \ 293 _wbflush(); \ 294 } 295 #endif 296 #ifndef __write_16 297 #define __write_16(a, v) (*(volatile u_int128_t *)(a) = (v)) { \ 298 _wbflush(); \ 299 } 300 #endif 301 #else /* EE_GCC */ 302 #ifdef __write_8 303 #error "can't override __write_8" 304 #endif 305 static __inline__ void 306 __write_8(bus_addr_t a, u_int64_t v) 307 { 308 __asm__ __volatile__( 309 ".set noreorder;" 310 ".set push;" 311 ".set r5900;" 312 "pextlw $8, %0, %1;" 313 "sd $8, 0(%2);" 314 "sync.l;" 315 ".set pop;" 316 ".set reorder;" 317 : : "r"((u_int32_t)((u_int64_t)(v) >> 32)), 318 "r"((u_int32_t)(v)), "r"((u_int32_t)(a)) : "$8"); 319 } 320 #define _write_16(a) "error. not yet" 321 #endif /* EE_GCC */ 322 323 #define __TYPENAME(BITS) u_int##BITS##_t 324 325 #define _BUS_SPACE_READ(PREFIX, BYTES, BITS) \ 326 static __TYPENAME(BITS) \ 327 PREFIX##_read_##BYTES(void *, bus_space_handle_t, bus_size_t); \ 328 static __TYPENAME(BITS) \ 329 PREFIX##_read_##BYTES(void *tag, bus_space_handle_t bsh, \ 330 bus_size_t offset) \ 331 { \ 332 return __read_##BYTES(VADDR(bsh, offset)); \ 333 } 334 335 #define _BUS_SPACE_READ_MULTI(PREFIX, BYTES, BITS) \ 336 static void \ 337 PREFIX##_read_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 338 __TYPENAME(BITS) *, bus_size_t); \ 339 static void \ 340 PREFIX##_read_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 341 bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count) \ 342 { \ 343 bus_addr_t a = VADDR(bsh, offset); \ 344 while (count--) \ 345 *addr++ = __read_##BYTES(a); \ 346 } 347 348 #define _BUS_SPACE_READ_REGION(PREFIX, BYTES, BITS) \ 349 static void \ 350 PREFIX##_read_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 351 __TYPENAME(BITS) *, bus_size_t); \ 352 static void \ 353 PREFIX##_read_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 354 bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count) \ 355 { \ 356 while (count--) { \ 357 *addr++ = __read_##BYTES(VADDR(bsh, offset)); \ 358 offset += BYTES; \ 359 } \ 360 } 361 362 #define _BUS_SPACE_WRITE(PREFIX, BYTES, BITS) \ 363 static void \ 364 PREFIX##_write_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 365 __TYPENAME(BITS)); \ 366 static void \ 367 PREFIX##_write_##BYTES(void *tag, bus_space_handle_t bsh, \ 368 bus_size_t offset, __TYPENAME(BITS) value) \ 369 { \ 370 __write_##BYTES(VADDR(bsh, offset), value); \ 371 } 372 373 #define _BUS_SPACE_WRITE_MULTI(PREFIX, BYTES, BITS) \ 374 static void \ 375 PREFIX##_write_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 376 const __TYPENAME(BITS) *, bus_size_t); \ 377 static void \ 378 PREFIX##_write_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 379 bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count) \ 380 { \ 381 bus_addr_t a = VADDR(bsh, offset); \ 382 while (count--) { \ 383 __write_##BYTES(a, *addr++); \ 384 } \ 385 } 386 387 #define _BUS_SPACE_WRITE_REGION(PREFIX, BYTES, BITS) \ 388 static void \ 389 PREFIX##_write_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 390 const __TYPENAME(BITS) *, bus_size_t); \ 391 static void \ 392 PREFIX##_write_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 393 bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count) \ 394 { \ 395 while (count--) { \ 396 __write_##BYTES(VADDR(bsh, offset), *addr++); \ 397 offset += BYTES; \ 398 } \ 399 } 400 401 #define _BUS_SPACE_SET_MULTI(PREFIX, BYTES, BITS) \ 402 static void \ 403 PREFIX##_set_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 404 __TYPENAME(BITS), bus_size_t); \ 405 static void \ 406 PREFIX##_set_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 407 bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count) \ 408 { \ 409 bus_addr_t a = VADDR(bsh, offset); \ 410 while (count--) { \ 411 __write_##BYTES(a, value); \ 412 } \ 413 } 414 415 #define _BUS_SPACE_SET_REGION(PREFIX, BYTES, BITS) \ 416 static void \ 417 PREFIX##_set_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 418 __TYPENAME(BITS), bus_size_t); \ 419 static void \ 420 PREFIX##_set_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 421 bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count) \ 422 { \ 423 while (count--) { \ 424 __write_##BYTES(VADDR(bsh, offset), value); \ 425 offset += BYTES; \ 426 } \ 427 } 428 429 #define _BUS_SPACE_COPY_REGION(PREFIX, BYTES, BITS) \ 430 static void \ 431 PREFIX##_copy_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 432 bus_space_handle_t, bus_size_t, bus_size_t); \ 433 static void \ 434 PREFIX##_copy_region_##BYTES(void *t, bus_space_handle_t h1, \ 435 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) \ 436 { \ 437 bus_size_t o; \ 438 if ((h1 + o1) >= (h2 + o2)) { \ 439 /* src after dest: copy forward */ \ 440 for (o = 0; c != 0; c--, o += BYTES) \ 441 __write_##BYTES(VADDR(h2, o2 + o), \ 442 __read_##BYTES(VADDR(h1, o1 + o))); \ 443 } else { \ 444 /* dest after src: copy backwards */ \ 445 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 446 __write_##BYTES(VADDR(h2, o2 + o), \ 447 __read_##BYTES(VADDR(h1, o1 + o))); \ 448 } \ 449 } 450 451 #define _BUS_SPACE_NO_MAP \ 452 (int (*)(void *, bus_addr_t, bus_size_t, int, \ 453 bus_space_handle_t *))_bus_space_invalid_access 454 #define _BUS_SPACE_NO_UNMAP \ 455 (void (*)(void *, bus_space_handle_t, bus_size_t)) \ 456 _bus_space_invalid_access 457 #define _BUS_SPACE_NO_SUBREGION \ 458 (int (*)(void *, bus_space_handle_t, bus_size_t, bus_size_t, \ 459 bus_space_handle_t *))_bus_space_invalid_access 460 #define _BUS_SPACE_NO_ALLOC \ 461 (int (*)(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t,\ 462 bus_size_t, int, bus_addr_t *, bus_space_handle_t *)) \ 463 _bus_space_invalid_access 464 #define _BUS_SPACE_NO_FREE \ 465 (void (*)(void *, bus_space_handle_t, bus_size_t)) \ 466 _bus_space_invalid_access 467 #define _BUS_SPACE_NO_VADDR \ 468 (void *(*)(void *, bus_space_handle_t))_bus_space_invalid_access 469 #define _BUS_SPACE_NO_READ(BYTES, BITS) \ 470 (u_int##BITS##_t (*)(void *, bus_space_handle_t, bus_size_t)) \ 471 _bus_space_invalid_access 472 #define _BUS_SPACE_NO_READ_MULTI(BYTES, BITS) \ 473 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 474 u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 475 #define _BUS_SPACE_NO_READ_REGION(BYTES, BITS) \ 476 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 477 u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 478 #define _BUS_SPACE_NO_WRITE(BYTES, BITS) \ 479 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 480 u_int##BITS##_t))_bus_space_invalid_access 481 #define _BUS_SPACE_NO_WRITE_MULTI(BYTES, BITS) \ 482 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 483 const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 484 #define _BUS_SPACE_NO_WRITE_REGION(BYTES, BITS) \ 485 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 486 const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 487 #define _BUS_SPACE_NO_SET_MULTI(BYTES, BITS) \ 488 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 489 u_int##BITS##_t, bus_size_t))_bus_space_invalid_access 490 #define _BUS_SPACE_NO_SET_REGION(BYTES, BITS) \ 491 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 492 u_int##BITS##_t, bus_size_t))_bus_space_invalid_access 493 #define _BUS_SPACE_NO_COPY_REGION(BYTES, BITS) \ 494 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 495 bus_space_handle_t, bus_size_t, bus_size_t))_bus_space_invalid_access 496 497 void _bus_space_invalid_access(void); 498 #endif /* _PLAYSTATION2_BUS_SPACE_PRIVATE */ 499 500 #define __pbs_c(a,b) __CONCAT(a,b) 501 #define __pbs_opname(op,size) __pbs_c(__pbs_c(__pbs_c(pbs_,op),_),size) 502 503 #define __pbs_rs(sz, tn, t, h, o) \ 504 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \ 505 (*(t)->__pbs_opname(r,sz))((t)->pbs_cookie, h, o)) 506 507 #define __pbs_ws(sz, tn, t, h, o, v) \ 508 ({ \ 509 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 510 (*(t)->__pbs_opname(w,sz))((t)->pbs_cookie, h, o, v); \ 511 }) 512 513 #define __pbs_nonsingle(type, sz, tn, t, h, o, a, c) \ 514 ({ \ 515 __BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer"); \ 516 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 517 (*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, a, c); \ 518 }) 519 520 #define __pbs_set(type, sz, tn, t, h, o, v, c) \ 521 ({ \ 522 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 523 (*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, v, c); \ 524 }) 525 526 #define __pbs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \ 527 ({ \ 528 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1"); \ 529 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2"); \ 530 (*(t)->__pbs_opname(c,sz))((t)->pbs_cookie, h1, o1, h2, o2, cnt); \ 531 }) 532 533 /* 534 * Create default bus_space tag. 535 */ 536 bus_space_tag_t bus_space_create(bus_space_tag_t, const char *, bus_addr_t, 537 bus_size_t); 538 void bus_space_destroy(bus_space_tag_t); 539 540 /* 541 * Mapping and unmapping operations. 542 */ 543 #define bus_space_map(t, a, s, f, hp) \ 544 (*(t)->pbs_map)((t)->pbs_cookie, (a), (s), (f), (hp)) 545 #define bus_space_unmap(t, h, s) \ 546 (*(t)->pbs_unmap)((t)->pbs_cookie, (h), (s)) 547 #define bus_space_subregion(t, h, o, s, hp) \ 548 (*(t)->pbs_subregion)((t)->pbs_cookie, (h), (o), (s), (hp)) 549 550 #endif /* _KERNEL */ 551 552 #define BUS_SPACE_MAP_CACHEABLE 0x01 553 #define BUS_SPACE_MAP_LINEAR 0x02 554 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 555 556 #ifdef _KERNEL 557 /* 558 * Allocation and deallocation operations. 559 */ 560 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 561 (*(t)->pbs_alloc)((t)->pbs_cookie, (rs), (re), (s), (a), (b), \ 562 (f), (ap), (hp)) 563 #define bus_space_free(t, h, s) \ 564 (*(t)->pbs_free)((t)->pbs_cookie, (h), (s)) 565 566 /* 567 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. 568 */ 569 #define bus_space_vaddr(t, h) \ 570 (*(t)->pbs_vaddr)((t)->pbs_cookie, (h)) 571 572 /* 573 * Bus barrier operations. The playstation2 does not currently require 574 * barriers, but we must provide the flags to MI code. 575 */ 576 #define bus_space_barrier(t, h, o, l, f) \ 577 ({ \ 578 _wbflush(); \ 579 }) 580 581 582 #define BUS_SPACE_BARRIER_READ 0x01 583 #define BUS_SPACE_BARRIER_WRITE 0x02 584 585 586 /* 587 * Bus read (single) operations. 588 */ 589 #define bus_space_read_1(t, h, o) __pbs_rs(1,u_int8_t,(t),(h),(o)) 590 #define bus_space_read_2(t, h, o) __pbs_rs(2,u_int16_t,(t),(h),(o)) 591 #define bus_space_read_4(t, h, o) __pbs_rs(4,u_int32_t,(t),(h),(o)) 592 #define bus_space_read_8(t, h, o) __pbs_rs(8,u_int64_t,(t),(h),(o)) 593 594 595 /* 596 * Bus read multiple operations. 597 */ 598 #define bus_space_read_multi_1(t, h, o, a, c) \ 599 __pbs_nonsingle(rm,1,u_int8_t,(t),(h),(o),(a),(c)) 600 #define bus_space_read_multi_2(t, h, o, a, c) \ 601 __pbs_nonsingle(rm,2,u_int16_t,(t),(h),(o),(a),(c)) 602 #define bus_space_read_multi_4(t, h, o, a, c) \ 603 __pbs_nonsingle(rm,4,u_int32_t,(t),(h),(o),(a),(c)) 604 #define bus_space_read_multi_8(t, h, o, a, c) \ 605 __pbs_nonsingle(rm,8,u_int64_t,(t),(h),(o),(a),(c)) 606 607 608 /* 609 * Bus read region operations. 610 */ 611 #define bus_space_read_region_1(t, h, o, a, c) \ 612 __pbs_nonsingle(rr,1,u_int8_t,(t),(h),(o),(a),(c)) 613 #define bus_space_read_region_2(t, h, o, a, c) \ 614 __pbs_nonsingle(rr,2,u_int16_t,(t),(h),(o),(a),(c)) 615 #define bus_space_read_region_4(t, h, o, a, c) \ 616 __pbs_nonsingle(rr,4,u_int32_t,(t),(h),(o),(a),(c)) 617 #define bus_space_read_region_8(t, h, o, a, c) \ 618 __pbs_nonsingle(rr,8,u_int64_t,(t),(h),(o),(a),(c)) 619 620 621 /* 622 * Bus write (single) operations. 623 */ 624 #define bus_space_write_1(t, h, o, v) __pbs_ws(1,u_int8_t,(t),(h),(o),(v)) 625 #define bus_space_write_2(t, h, o, v) __pbs_ws(2,u_int16_t,(t),(h),(o),(v)) 626 #define bus_space_write_4(t, h, o, v) __pbs_ws(4,u_int32_t,(t),(h),(o),(v)) 627 #define bus_space_write_8(t, h, o, v) __pbs_ws(8,u_int64_t,(t),(h),(o),(v)) 628 629 630 /* 631 * Bus write multiple operations. 632 */ 633 #define bus_space_write_multi_1(t, h, o, a, c) \ 634 __pbs_nonsingle(wm,1,u_int8_t,(t),(h),(o),(a),(c)) 635 #define bus_space_write_multi_2(t, h, o, a, c) \ 636 __pbs_nonsingle(wm,2,u_int16_t,(t),(h),(o),(a),(c)) 637 #define bus_space_write_multi_4(t, h, o, a, c) \ 638 __pbs_nonsingle(wm,4,u_int32_t,(t),(h),(o),(a),(c)) 639 #define bus_space_write_multi_8(t, h, o, a, c) \ 640 __pbs_nonsingle(wm,8,u_int64_t,(t),(h),(o),(a),(c)) 641 642 643 /* 644 * Bus write region operations. 645 */ 646 #define bus_space_write_region_1(t, h, o, a, c) \ 647 __pbs_nonsingle(wr,1,u_int8_t,(t),(h),(o),(a),(c)) 648 #define bus_space_write_region_2(t, h, o, a, c) \ 649 __pbs_nonsingle(wr,2,u_int16_t,(t),(h),(o),(a),(c)) 650 #define bus_space_write_region_4(t, h, o, a, c) \ 651 __pbs_nonsingle(wr,4,u_int32_t,(t),(h),(o),(a),(c)) 652 #define bus_space_write_region_8(t, h, o, a, c) \ 653 __pbs_nonsingle(wr,8,u_int64_t,(t),(h),(o),(a),(c)) 654 655 656 /* 657 * Set multiple operations. 658 */ 659 #define bus_space_set_multi_1(t, h, o, v, c) \ 660 __pbs_set(sm,1,u_int8_t,(t),(h),(o),(v),(c)) 661 #define bus_space_set_multi_2(t, h, o, v, c) \ 662 __pbs_set(sm,2,u_int16_t,(t),(h),(o),(v),(c)) 663 #define bus_space_set_multi_4(t, h, o, v, c) \ 664 __pbs_set(sm,4,u_int32_t,(t),(h),(o),(v),(c)) 665 #define bus_space_set_multi_8(t, h, o, v, c) \ 666 __pbs_set(sm,8,u_int64_t,(t),(h),(o),(v),(c)) 667 668 669 /* 670 * Set region operations. 671 */ 672 #define bus_space_set_region_1(t, h, o, v, c) \ 673 __pbs_set(sr,1,u_int8_t,(t),(h),(o),(v),(c)) 674 #define bus_space_set_region_2(t, h, o, v, c) \ 675 __pbs_set(sr,2,u_int16_t,(t),(h),(o),(v),(c)) 676 #define bus_space_set_region_4(t, h, o, v, c) \ 677 __pbs_set(sr,4,u_int32_t,(t),(h),(o),(v),(c)) 678 #define bus_space_set_region_8(t, h, o, v, c) \ 679 __pbs_set(sr,8,u_int64_t,(t),(h),(o),(v),(c)) 680 681 682 /* 683 * Copy region operations. 684 */ 685 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ 686 __pbs_copy(1, u_int8_t, (t), (h1), (o1), (h2), (o2), (c)) 687 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ 688 __pbs_copy(2, u_int16_t, (t), (h1), (o1), (h2), (o2), (c)) 689 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ 690 __pbs_copy(4, u_int32_t, (t), (h1), (o1), (h2), (o2), (c)) 691 #define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ 692 __pbs_copy(8, u_int64_t, (t), (h1), (o1), (h2), (o2), (c)) 693 694 /* 695 * Bus stream operations--defined in terms of non-stream counterparts 696 */ 697 #define __BUS_SPACE_HAS_STREAM_METHODS 1 698 #define bus_space_read_stream_1 bus_space_read_1 699 #define bus_space_read_stream_2 bus_space_read_2 700 #define bus_space_read_stream_4 bus_space_read_4 701 #define bus_space_read_stream_8 bus_space_read_8 702 #define bus_space_read_multi_stream_1 bus_space_read_multi_1 703 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 704 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 705 #define bus_space_read_multi_stream_8 bus_space_read_multi_8 706 #define bus_space_read_region_stream_1 bus_space_read_region_1 707 #define bus_space_read_region_stream_2 bus_space_read_region_2 708 #define bus_space_read_region_stream_4 bus_space_read_region_4 709 #define bus_space_read_region_stream_8 bus_space_read_region_8 710 #define bus_space_write_stream_1 bus_space_write_1 711 #define bus_space_write_stream_2 bus_space_write_2 712 #define bus_space_write_stream_4 bus_space_write_4 713 #define bus_space_write_stream_8 bus_space_write_8 714 #define bus_space_write_multi_stream_1 bus_space_write_multi_1 715 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 716 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 717 #define bus_space_write_multi_stream_8 bus_space_write_multi_8 718 #define bus_space_write_region_stream_1 bus_space_write_region_1 719 #define bus_space_write_region_stream_2 bus_space_write_region_2 720 #define bus_space_write_region_stream_4 bus_space_write_region_4 721 #define bus_space_write_region_stream_8 bus_space_write_region_8 722 723 #endif /* _KERNEL */ 724 725 /* 726 * Flags used in various bus DMA methods. 727 */ 728 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 729 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 730 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 731 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 732 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 733 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 734 #define BUS_DMA_BUS2 0x020 735 #define BUS_DMA_BUS3 0x040 736 #define BUS_DMA_BUS4 0x080 737 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 738 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 739 740 #define PLAYSTATION2_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 741 742 /* Forwards needed by prototypes below. */ 743 struct mbuf; 744 struct uio; 745 746 /* 747 * Operations performed by bus_dmamap_sync(). 748 */ 749 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 750 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 751 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 752 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 753 754 typedef struct playstation2_bus_dma_tag *bus_dma_tag_t; 755 typedef struct playstation2_bus_dmamap *bus_dmamap_t; 756 757 /* 758 * bus_dma_segment_t 759 * 760 * Describes a single contiguous DMA transaction. Values 761 * are suitable for programming into DMA registers. 762 */ 763 struct playstation2_bus_dma_segment { 764 bus_addr_t ds_addr; /* DMA address */ 765 bus_size_t ds_len; /* length of transfer */ 766 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 767 }; 768 typedef struct playstation2_bus_dma_segment bus_dma_segment_t; 769 770 /* 771 * bus_dma_tag_t 772 * 773 * A machine-dependent opaque type describing the implementation of 774 * DMA for a given bus. 775 */ 776 777 struct playstation2_bus_dma_tag { 778 /* 779 * DMA mapping methods. 780 */ 781 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 782 bus_size_t, bus_size_t, int, bus_dmamap_t *); 783 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 784 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 785 bus_size_t, struct proc *, int); 786 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 787 struct mbuf *, int); 788 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 789 struct uio *, int); 790 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 791 bus_dma_segment_t *, int, bus_size_t, int); 792 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 793 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 794 bus_addr_t, bus_size_t, int); 795 796 /* 797 * DMA memory utility functions. 798 */ 799 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 800 bus_size_t, bus_dma_segment_t *, int, int *, int); 801 void (*_dmamem_free)(bus_dma_tag_t, 802 bus_dma_segment_t *, int); 803 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 804 int, size_t, caddr_t *, int); 805 void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); 806 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 807 int, off_t, int, int); 808 809 /* 810 * DMA controller private. 811 */ 812 void *_dmachip_cookie; 813 }; 814 815 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 816 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 817 #define bus_dmamap_destroy(t, p) \ 818 (*(t)->_dmamap_destroy)((t), (p)) 819 #define bus_dmamap_load(t, m, b, s, p, f) \ 820 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 821 #define bus_dmamap_load_mbuf(t, m, b, f) \ 822 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 823 #define bus_dmamap_load_uio(t, m, u, f) \ 824 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 825 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 826 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 827 #define bus_dmamap_unload(t, p) \ 828 (*(t)->_dmamap_unload)((t), (p)) 829 #define bus_dmamap_sync(t, p, o, l, ops) \ 830 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 831 832 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 833 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 834 #define bus_dmamem_free(t, sg, n) \ 835 (*(t)->_dmamem_free)((t), (sg), (n)) 836 #define bus_dmamem_map(t, sg, n, s, k, f) \ 837 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 838 #define bus_dmamem_unmap(t, k, s) \ 839 (*(t)->_dmamem_unmap)((t), (k), (s)) 840 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 841 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 842 843 /* 844 * bus_dmamap_t 845 * 846 * Describes a DMA mapping. 847 */ 848 struct playstation2_bus_dmamap { 849 /* 850 * PRIVATE MEMBERS: not for use my machine-independent code. 851 */ 852 bus_size_t _dm_size; /* largest DMA transfer mappable */ 853 int _dm_segcnt; /* number of segs this map can map */ 854 bus_size_t _dm_maxsegsz; /* largest possible segment */ 855 bus_size_t _dm_boundary; /* don't cross this */ 856 int _dm_flags; /* misc. flags */ 857 858 /* 859 * PUBLIC MEMBERS: these are used by machine-independent code. 860 */ 861 bus_size_t dm_mapsize; /* size of the mapping */ 862 int dm_nsegs; /* # valid segments in mapping */ 863 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 864 }; 865 866 #ifdef _PLAYSTATION2_BUS_DMA_PRIVATE 867 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 868 bus_size_t, int, bus_dmamap_t *); 869 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 870 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 871 bus_size_t, struct proc *, int); 872 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 873 struct mbuf *, int); 874 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 875 struct uio *, int); 876 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 877 bus_dma_segment_t *, int, bus_size_t, int); 878 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 879 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 880 bus_size_t, int); 881 882 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 883 bus_size_t alignment, bus_size_t boundary, 884 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 885 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 886 int nsegs); 887 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 888 int nsegs, size_t size, caddr_t *kvap, int flags); 889 void _bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, 890 size_t size); 891 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 892 int nsegs, off_t off, int prot, int flags); 893 894 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 895 bus_size_t alignment, bus_size_t boundary, 896 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 897 vaddr_t low, vaddr_t high); 898 899 extern struct playstation2_bus_dma_tag playstation2_default_bus_dma_tag; 900 #endif /* _PLAYSTATION2_BUS_DMA_PRIVATE */ 901 902 #endif /* _PLAYSTATION2_BUS_H_ */ 903